Analysis of multidimensional DSP specifications

Verbauwhede, Ingrid; Scheers, C.; Rabaey, Jan M.

doi:10.1109/78.553544

Cited by 4 publications

(3 citation statements)

References 14 publications

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“…Therefore, the synchronous data flow graph model is introduced [Lee and Messerschmitt 1987] for individual or 1D signals. To model the dependencies between multidimensional arrays of signals, we use the stream model of Phideo [Verhaegh et al 2001] and the single assignment multidimensional signal representations [Verbauwhede et al 1996].…”

Section: Specification and Models Of Computationmentioning

confidence: 99%

Skiing the embedded systems mountain

Verbauwhede

Schaumont

2005

ACM Trans. Embed. Comput. Syst.

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UCLA teaches students how to master the steep slopes of the embedded systems mountain. The EE201A graduate course connects high-level design specification to embedded implementation. There is a long-standing and wide culture gap between system designers that create those abstract specifications and the system architects that need to implement them. In industry, the culture gap has separated software from hardware teams, and platform creators from platform users. In an embedded context, where these are very tightly connected, this leads to large inefficiencies both in design time and design results. Our course takes students to both sides of the gap and lets them look at this problem from different perspectives. For a given application, it teaches how to select target architectures, tools, and design methods. The course covers a stepwise systematic design process. It includes specification, transformation, and refinement of an application. Specifications enable systematic and structured expression of an application. Transformations rework specifications into ones that are a better match for a given target architecture. Refinements lower the abstraction level toward the target architecture. The embedded systems mountain is traversed in two directions. A vertical refinement axis covers elements such as power-memory-reduction methods or fixedpoint refinement. A horizontal exploration axis covers various architecture alternatives including application-specific integrated circuits (ASIC), domain-specific processors, digital signal processors (DSP), embedded cores, programmable processors, and system-on-chip (SOC). During the course, the students also go through an extensive design project to apply the methods learned in this course. A typical embedded application is used to drive the project. In this paper it is illustrated using an embedded version of an image encoder, more specifically a JPEG encoder. Several commercial tools, design environments, and platforms have been used as alternative implementation targets for this application.

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Section: Specification and Models Of Computationmentioning

confidence: 99%

Skiing the embedded systems mountain

Verbauwhede

Schaumont

2005

ACM Trans. Embed. Comput. Syst.

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“…In this section, we discuss two approaches to derive the data dependencies for the accesses in arrays, i.e. static analysis and symbolic execution [VSR96]. Static analysis relies on an underlying geometric model, such that transformations for the NLP can be computed, but requires affine expressions.…”

Section: Data Dependency Derivationmentioning

confidence: 99%

“…Symbolic execution has no problem handling nonaffine expressions, but requires a manifest access pattern before data dependencies can be derived. Therefore, approaches applying symbolic execution can have difficulties with non-manifest behavior [VSR96].…”

Section: Data Dependency Derivationmentioning

confidence: 99%

Automatic parallelization of nested loop programs for non-manifest real-time stream processing applications

Bijlsma¹

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Distributed architectures and logical-task decomposition in multimedia surveillance systems

et al. 2001

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In the past few years, the development of complex surveillance systems has captured the interest of both the research and industrial worlds. Strong and challenging requirements of modern society are involved in this problem, which aims to increase safety and security in several application domains such as transport, tourism, home and bank security, military applications, etc. At the same time, fast improvements in microelectronics, telecommunications, and computer science make it necessary to consider new perspectives in this field. The main objective of this paper is to investigate, discuss, and evaluate the impact of distributed processing and new communication techniques on multimedia surveillance systems, which represent the so-called third-generation surveillance systems (3GSSs). In particular aspects related to the distribution of intelligence among multiple-processing and wide-bandwidth resources are discussed in detail. It is shown how distribution of intelligence can be obtained by a hierarchical architecture that partitions, in a dynamic way, the main logical processing tasks (i.e., representation, recognition, and communication) performed in a 3GSS physical architecture made lip of intelligent cameras, hubs, and central control rooms. The advantages of this solution are pointed out in terms of: 1) increased flexibility and reconfigurability and 2) optimal allocation of available processing and bandwidth resources. Finally, a case study is analyzed that allows one to gain a deeper insight into a distributed surveillance system

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Analysis of multidimensional DSP specifications

Cited by 4 publications

References 14 publications

Skiing the embedded systems mountain

Skiing the embedded systems mountain

Automatic parallelization of nested loop programs for non-manifest real-time stream processing applications

Distributed architectures and logical-task decomposition in multimedia surveillance systems

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