Analysis of scheduled Latency insensitive systems with periodic clock calculus

Abstract

Originally the Latency insensitive protocols (LIP) were invented to make a system elastic to the interconnect latencies using handshaking signals such as 'valid' and 'stall'. These require extra signals leading to area overhead and may affect throughput of the system. To optimize away some of these overheads, scheduled LIPs were proposed which replaced the complex handshake control blocks by a central scheduling scheme. One can view a scheduled LIP based design as a system where within each strongly connected component of the system, the modules and the relay stations are scheduled by activation signals, which can be thought of as infinite sequence of '1's and '0's. If such sequences are periodic, one can view them as periodic clocks. Given the advances in periodic clock calculus in the synchronous programming context, in this paper, we analyze the LIP scheduling problem within the framework of periodic clock calculus. Such analysis provides straight forward algorithms to compute the throughput of scheduled LIP based systems . Within this framework, we also propose a method to synthesize fractional synchronizers. Fractional synchronizers are used to equalize cycles with different throughputs. Our method can determine the numbers and the scheduling sequences of such fractional synchronizers using the periodic clock calculus.

Heuristic algorithm for periodic clock optimisation in scheduling‐based latency‐insensitive design

“…These periodic words are required for calculating the periodic clock of the selected reconvergent node. Finding the periodic word for the inputs connections is somewhat similar to the method in [7]. However, we introduce here an easier method.…”

“…Therefore no hand-shake signal is required in this methodology and RSs are substituted with simple flip-flops. As it is mentioned in [6,7], this methodology reduces the routing resources and the area cost incurred by the complicated hand-shake controlling blocks. Although, in some cases, the sequences might become too long and storing the periodic sequences in the shift registers may lead to more area overhead than it saves [5].…”