Analysis of stepwise charging limits and its implementation for efficiency improvement in switched capacitor DC–DC converters

Veirano, Francisco; Lisboa, Pablo Castro; Pérez-Nicoli, Pablo; Naviner, Lírida Alves de Barros; Silveira, Fernando

doi:10.1007/s10470-021-01810-5

Cited by 6 publications

(4 citation statements)

References 22 publications

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“…Alternatively, this paper proposes using the inductor-less stepwise charging technique introduced in [24] and [25] to reduce the gate-drive losses. Stepwise charging has been utilized to reduce power in ADCs [26], [27], clock drivers [28], touch sensors [29], and switched-capacitor DC-DC converters [30] but until now use in inductive DC-DC converters has only been theorized [17] and has not been demonstrated in hardware. Fig.…”

Section: ×3mentioning

confidence: 99%

“…5 requires consecutive timing signals, yn, to generate the staggered stepwise switching signals sR and sF. The timing circuit in [24] uses a finite state machine to produce the timing signals, which requires a clock and substantial logic, while [30] utilizes the inherent delay of current-starved logic gates. The proposed approach is to use the delay line circuit included in Fig.…”

Section: Stepwise Timing Controlmentioning

confidence: 99%

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A ±0.5-mV-Minimum-Input DC-DC Converter With Stepwise Adiabatic Gate-Drive and Efficient Timing Control for Thermoelectric Energy Harvesting

Carlson

Smith

2023

IEEE Trans. Circuits Syst. I

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This paper presents a step-up DC-DC converter that uses a stepwise gate-drive technique to reduce the power FET gate-drive energy by 82%, allowing positive efficiency down to an input voltage of ±0.5 mV-the lowest input voltage ever achieved for a DC-DC converter as far as we know. Below ±0.5 mV the converter automatically hibernates, reducing quiescent power consumption to just 255 pW. The converter has an efficiency of 63% at ±1 mV and 84% at ±6 mV. The input impedance is programmable from 1 Ω to 600 Ω to achieve maximum power extraction. A novel delay line circuit controls the stepwise gatedrive timing, programmable input impedance, and hibernation behavior. Bipolar input voltage is supported by using a flyback converter topology with two secondary windings. A generated power good signal enables the load when the output voltage has charged above 2.7 V and disables when the output voltage has discharged below 2.5 V. The DC-DC converter was used in a thermoelectric energy harvesting system that effectively harvests energy from small indoor temperature fluctuations of less than 1°C. Also, an analytical model with unprecedented accuracy of the stepwise gate-drive energy is presented.Index terms-Energy harvesting, DC-DC converter, bipolar, flyback converter, low-voltage, low-power, adiabatic gate-drive, stepwise gate-drive, charge recycling, thermoelectric generator.

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Section: ×3mentioning

confidence: 99%

Section: Stepwise Timing Controlmentioning

confidence: 99%

A ±0.5-mV-Minimum-Input DC-DC Converter With Stepwise Adiabatic Gate-Drive and Efficient Timing Control for Thermoelectric Energy Harvesting

Carlson

Smith

2023

IEEE Trans. Circuits Syst. I

View full text Add to dashboard Cite

show abstract

“…Alternatively, this paper proposes using the inductor-less stepwise charging technique introduced in [23] and [24] to reduce the gate-drive losses. Stepwise charging has been utilized to reduce power in ADCs [25], [26], clock drivers [27], touch sensors [28], and switched-capacitor DC-DC converters [29] but until now use in inductive DC-DC converters has only been theorized [17] and has not been demonstrated in hardware. Fig.…”

Section: ×3mentioning

confidence: 99%

“…5 requires consecutive timing signals, yn, to generate the staggered stepwise switching signals sR and sF. The timing circuit in [23] uses a finite state machine to produce the timing signals, which requires a clock and substantial logic, while [29] utilizes the inherent delay of current-starved logic gates. The proposed approach is to use the delay line circuit included in Fig.…”

Section: Stepwise Timing Controlmentioning

confidence: 99%

A ±0.5-mV-Minimum-Input DC-DC Converter with Stepwise Adiabatic Gate-Drive and Efficient Timing Control for Thermoelectric Energy Harvesting

Carlson¹,

Smith²

2022

Preprint

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<p>This paper presents a step-up DC-DC converter that uses a stepwise gate-drive technique to reduce the power FET gate-drive energy by 82%, allowing positive efficiency down to an input voltage of ±0.5 mV—the lowest input voltage ever achieved for a DC-DC converter as far as we know. Below ±0.5 mV the converter automatically hibernates, reducing quiescent power consumption to just 255 pW. The converter has an efficiency of 63% at ±1 mV and 84% at ±6 mV. The input impedance is programmable from 1 Ω to 600 Ω to achieve maximum power extraction. A novel delay line circuit controls the stepwise gate-drive timing, programmable input impedance, and hibernation behavior. Bipolar input voltage is supported by using a flyback converter topology with two secondary windings. A generated power good signal enables the load when the output voltage has charged above 2.7 V and disables when the output voltage has discharged below 2.5 V. The DC-DC converter was used in a thermoelectric energy harvesting system that effectively harvests energy from small indoor temperature fluctuations of less than 1°C. Also, an analytical model with unprecedented accuracy of the stepwise gate-drive energy is presented. </p>

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Improved Turn-On Speed of Low-Power Loads in Pulsed Power Supply Scheme and High-Energy Efficiency

Amraee

Farshidi

Kosarian

2023

J CIRCUIT SYST COMP

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There are cases in energy supply applications with low-power batteries, where the power required by the load is larger than the supply maximum deliverable power. Using a capacitor to create a high instantaneous power for the load was investigated as a useful solution. To increase the charging efficiency, a stepwise method for charging the capacitor was employed. This paper presents a new pulsed power supply approach in which the charging process is resumed after high instantaneous power delivery. Through this, the loss of residual energy in the capacitor was decreased and load turn-on speed and energy efficiency were significantly improved. The proposed structure consists of a buck converter that charges the capacitor using inductor current. A pulse frequency modulation (PFM) technique was used to generate the necessary signals for the buck converter switches, which resulted in controlling the inductor current. The proposed circuit was designed and simulated in a 0.18[Formula: see text][Formula: see text]m CMOS technology. It was shown that the designed CMOS circuit could reach a peak energy efficiency of 93.2% with a sleep period of 1.05[Formula: see text]ms when the load consumes 7.06[Formula: see text][Formula: see text]J of energy.

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Analysis of stepwise charging limits and its implementation for efficiency improvement in switched capacitor DC–DC converters

Cited by 6 publications

References 22 publications

A ±0.5-mV-Minimum-Input DC-DC Converter With Stepwise Adiabatic Gate-Drive and Efficient Timing Control for Thermoelectric Energy Harvesting

A ±0.5-mV-Minimum-Input DC-DC Converter With Stepwise Adiabatic Gate-Drive and Efficient Timing Control for Thermoelectric Energy Harvesting

A ±0.5-mV-Minimum-Input DC-DC Converter with Stepwise Adiabatic Gate-Drive and Efficient Timing Control for Thermoelectric Energy Harvesting

Improved Turn-On Speed of Low-Power Loads in Pulsed Power Supply Scheme and High-Energy Efficiency

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