Analysis of strained-layer superlattice effects on dislocation density reduction in GaAs on Si substrates

Abstract

High quality GaAs films with dislocation densities of 1–2×106 cm−2 on (100)Si substrates have been obtained for combination of strained-layer superlattice insertion and thermal cycle growth using the metalorganic chemical vapor deposition method. In this letter, remarkable reduction effects of dislocation density in the GaAs layers due to InGaAs/GaAs and InGaAs/GaAsP strained-layer superlattice insertion on Si have been analyzed by calculating the dislocation force exerted by the misfit due to the strained-layer superlattice insertions. Threshold layer thickness needed for dislocation reduction and critical thickness for dislocation generation have been clarified for several strained-layer superlattice systems.

III–V Multijunction Solar Cell Integration with Silicon: Present Status, Challenges and Future Outlook

“…The larger bandgap of GaAsP buffers could circumvent the problem of utilizing the Si substrate as an active subcell. Among the various heteroepitaxial approaches employed for III-V-on-Si epitaxy, the SiGe graded buffer ) and the direct GaAs on Si epitaxial approach involving SL superlattices (SLSs) (Yamaguchi, Nishioka, and Sugo 1989) have reported the lowest TDD~1 Â 10 6 cm −2 . Further dislocation reduction to~1 Â 10 5 cm −2 would enable the GaAs-on-Si solar cells to compete with lattice-matched GaAs-on-GaAs solar cells.…”

“…Such defects and dislocations have a detrimental impact on the minority carrier lifetime and hence the solar cell performance. The most noteworthy techniques which have been employed for direct GaAs epitaxy on Si to reduce the threading dislocation density (TDD) include (i) the thermal-cycle annealing (TCA) (Yamaguchi, Nishioka, and Sugo 1989;Yamaguchi 1991) and (ii) the low temperature and low growth rate process during the initial GaAs nucleation on Si (Vernon et al 1986;Tran et al 2012;Yamaguchi, Nishioka, and Sugo 1989;Yamaguchi 1991;Bolkhovityanov and Pchelyakov 2008). Growing thicker GaAs buffers has also been shown to facilitate dislocation reduction (Vernon et al 1986) but adds to the overall cost and time of the epitaxial process.…”

“…Further improvement in the 2J AlGaAs/Si efficiency would require a superior quality and higher bandgap (Al-rich) top cell (~1.7-1.8 eV), making it necessary to focus efforts on improving the minority carrier lifetime in Al-rich AlGaAs solar cell material (Soga et al 1997), besides minimizing the TDs generated due to the lattice-mismatch with Si substrate. Yamaguchi, Nishioka, and Sugo (1989) utilized In 0.1 Ga 0.9 As/GaAs SLSs in combination with TCA to significantly minimize the TDD to~1-2 Â 10 6 cm −2 for GaAs layers grown on (100) Si substrate by MOCVD. For the growth of 1J GaAs solar cell on Si, (100) Si substrates with 2˚offcut Figure 2 Cross-sectional TEM image of heteroepitaxial GaAs grown on Si using (a) only TCA , (b) TCA along with In 0.07 Ga 0.93 As SL (Takano et al 1998), reprinted with permission from Takano et al (1998) and Soga et al (1996).…”

HETEROEPITAXY OF GaAs ON Si: METHODS TO DECREASE THE DEFECT DENSITY IN THE EPILAYER

“…If the strain is larger than the value obtained from these considerations, new dislocations will be formed for strain relief when the layer exceeds a second critical thickness , as pointed out by Yamaguchi. 55 …”

Atomic Layer Epitaxial Growth of Gaas on Porous Silicon Substrate

“…The most important challenge is to obtain GaAs layers on Si with quality comparable to that on GaAs substrate. Several techniques have been proposed to obtain GaAs film on Si with the reduction of dislocation density such as the insertion of strained-layer superlattice (SLS) [1] as buffer layer, the thermal annealing process [2] , the thermal cycle growth [3] and the low-temperature growth [4] . The porous silicon (PSi) has been investigated as a new material for microelectronic devices.…”