Analysis of Surface Charge Effects and Edge Fringing Capacitance in Planar GaAs and GaN Schottky Barrier Diodes

Abstract

In this article, by means of a 2-D ensemble Monte Carlo simulator, the Schottky barrier diodes (SBDs) with realistic geometries based on GaAs and GaN are studied as promising devices for increasing the high-frequency performance-and power-handling capability of frequency mixers and multipliers. The nonlinearity of the capacitance-voltage (C-V) characteristic is the most important parameter for optimizing the performance of SBDs as frequency multipliers. The small size of the diodes used for ultrahigh-frequency applications makes the value of its intrinsic capacitance to deviate from the ideal one due to fringing effects. We have observed that the value of the edge capacitance well into reverse bias does not depend on the applied voltage. We define an edge-effect parameter β, which, interestingly, is affected by the presence or absence of surface charges at the semiconductor-dielectric interface σ . Two physical models have been considered: a fixed σ related to a surface potential V s constant surface-charge model (CCM) and a self-consistent model in which the local value of σ is dynamically evaluated depending on the surrounding electron density self-consistent surface-charge model (SCCM). Using the CCM, we obtain that β depends on the depth of the depletion region W s created by the surface charges, nearly irrespectively of the epilayer doping or semiconductor type. The more realistic SCCM indicates that, at low frequencies, when the surface charges are able to follow the variations of the applied voltage, the value of β approaches the one obtained without surface charges, while the high-frequency value (the significant one) is smaller. Index Terms-Edge effects (EEs), GaAs and GaN planar Schottky barrier diodes (SBDs), Monte Carlo (MC) simulation.

Dielectric Passivation and Edge Effects in Planar GaN Schottky Barrier Diodes

“…3(b) shows β e and β T as a function of L EP for different dielectrics. As reported in a previous work for less realistic SBD geometries [20], β e remains almost constant for long values of L EP , but, for L EP shorter than a given length, it significantly decreases. β T exhibits similar behavior.…”

“…When the limit L EP = 0 nm is reached, the EE capacitance is reduced to a certain value that again depends on the dielectric, β e and β T still being different because of the presence of surface charge at the vertical sidewall of the epilayer. For the dielectrics with lower pas , small negative values of β e are obtained, which means that EEs are completely suppressed and even inverted [20].…”

“…The SCCM has been validated in previous works [19]- [22]. The total capacitance (per unit length) C(V ) = C Ideal + C EE is given by the sum of the ideal capacitance C Ideal = L sch • sc /W (V ) and the EE capacitance C EE = β • sc [10], [20], where sc is the permittivity of the semiconductor, W (V ) the depth of the depletion region, and L sch the length of the Schottky contact. The dimensionless parameter β, characteristic of EEs, is determined and analyzed as in [20].…”

“…The total capacitance (per unit length) C(V ) = C Ideal + C EE is given by the sum of the ideal capacitance C Ideal = L sch • sc /W (V ) and the EE capacitance C EE = β • sc [10], [20], where sc is the permittivity of the semiconductor, W (V ) the depth of the depletion region, and L sch the length of the Schottky contact. The dimensionless parameter β, characteristic of EEs, is determined and analyzed as in [20]. β is calculated from the slope of the representation of (Q MC − Q Id ) versus (V − V b ), where Q MC is the charge depleted by the bias voltage obtained from the MC simulations, Q Id the ideal depleted charge, V the applied voltage, and V b the built-in voltage of the Schottky contact (here considered to take a typical value of 0.8 V).…”

“…β is calculated from the slope of the representation of (Q MC − Q Id ) versus (V − V b ), where Q MC is the charge depleted by the bias voltage obtained from the MC simulations, Q Id the ideal depleted charge, V the applied voltage, and V b the built-in voltage of the Schottky contact (here considered to take a typical value of 0.8 V). By using the SCCM for the consideration of surface charges, two EE parameters can be determined depending on the charges included in the calculation of the EE capacitance: β e , which is given just by the charge associated with the variation in the number of electrons inside the diode, and β T , which is associated with the variation of the total charge, including as well the variation of the surface charge [20]. The trapping/release of electrons in surface deep traps associated with the variations of the surface charge included in our SCCM are slow processes and are expected to have effect only when operating at low-frequency.…”