Analysis of temporal carrier build‐up in reconfigurable field‐effect transistor

Abstract

Based on the analysis of the carrier density change of a symmetric gate reconfigurable field‐effect transistor that can operate p‐ or n‐type transistors in an integrated circuit (IC), its unique limiting factor, carrier build‐up time, is quantitatively derived for operating speed in addition to conventional resistance and capacitance (RC) and transit time effect. Originating from the characteristic of carrier confinement in a channel between two Schottky potential barriers, the carrier build‐up time for the operation could take up to ∼1000 times longer than the transit time across the channel.