Analysis of THD and output voltage performance for cascaded multilevel inverter using carrier pulse width modulation techniques

Palanivel, P.; Dash, Subhransu Sekhar

doi:10.1049/iet-pel.2010.0332

Cited by 163 publications

(79 citation statements)

References 13 publications

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“…A phase-locked-loop control (PLL) is used to detect the phase and frequency of the fundamental positive-sequence component of the system voltage, already in terms of αβ-variables ( and ). The reactive compensating current references ( * and * ) are calculated using the definitions given in the p-q Theory through Equations (5) and (6). Finally, the current references and the generated converter currents are compared in the current loop controller, Equations (7) and (8), to determine the reactive-voltage references for power-factor compensation ( * and * ), which are subsequently transformed back to the abc-reference ( * , * and * ) using Equation (9).…”

Section: Reactive-power Controlmentioning

confidence: 99%

“…Moreover, multilevel topology also presents a lower total harmonic distortion (THD) and allows a reduction of switching frequency [2,3]. Thus, the use of multilevel topologies combined with power quality conditioners, such as Static Synchronous Compensator (STATCOM) [4,5], can improve power quality and efficiency in distribution systems [6].…”

Section: Introductionmentioning

confidence: 99%

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An Improved Asymmetric Cascaded Multilevel D–STATCOM with Enhanced Hybrid Modulation

2015

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Problems related to power quality, which in the last years were responsible only for small losses in low-voltage distribution systems, are now causing damage to power apparatuses and financial losses also in medium-voltage systems. The necessity of a better quality of power supply encourages the development of new specific custom power devices directly connected in medium-voltage distribution systems. It is well know that the multilevel converters are capable of being installed directly in the medium voltage, and presents several advantages when compared with conventional two-level converters. Some topologies, like the asymmetric cascaded multilevel converter, presents difficulties in regulating the voltages of all isolated dc-link capacitors. In this context, this article presents an asymmetric nineteen-level D-STATCOM (Distribution Static Synchronous Compensator) with a reactive power and dc-link regulation control loops for generic cascaded multilevel converters in order to improve the power quality in medium-voltage distribution systems. The performance of the proposed control method for a multilevel D-STATCOM is presented and evaluated in a downscaled prototype. OPEN ACCESSElectronics 2015, 4 312

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Section: Reactive-power Controlmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

An Improved Asymmetric Cascaded Multilevel D–STATCOM with Enhanced Hybrid Modulation

2015

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“…Zixin et al [10] discuses level of the output voltage is only half of the dc-link voltage in all conditions, leading to much reduced dv/dt. Palanivel et al [11] observed this topologies of multilevel inverter have several advantages such as high output voltage, lower electromagnetic interference, lower THD. Khoucha et al [12] developed a symmetrical and asymmetrical arrangements of five-and seven-level H-bridge inverters are compared in order to determine optimum arrangement with lower switching losses and optimized output voltage quality.…”

Section: Introductionmentioning

confidence: 99%

Performance Evaluation on Unipolar Pwm Strategies for Three Phase Diode Clamped Multilevel Inverter

C.R¹,

Natarajan²,

Bensraj³

et al. 2015

IJSCMC

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This paper proposes different types of modulation methods for the Diode Clamped Multi Level Inverter (DCMLI). In this paper, a DCMLI is controlled with Sinusoidal PWM technique (SPWM), Third Harmonic Injection PWM technique, Sixty degree PWM technique and Stepped wave technique with Sub harmonic (SHPWM), Carrier Overlapping (CO), Phase shift (PS) , Variable frequency (VF) and the variation of Total Harmonic Distortion (THD) in their outputs are observed and also chosen inverter is controlled by SPWM technique, THI PWM technique, Sixty degree PWM and Stepped wave technique by varying the modulation index. Simulation are performed using MATLAB-SIMULINK. It is observed that SHPWM strategy provide output with relatively low distortion. It is observed that COPWM strategy provides higherV rms compared to other modulation strategies.

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“…Small voltage steps in MLIs results in withstanding proficient voltage, minimal harmonics, enhances the electro-magnetic compatibility, eliminated the on/off losses, and excellent power quality [1][2][3][4][5][6][7]. Cascaded MLIs, Diode-Clamped MLIs, Flying Capacitor MLIs are the different types of MLIs types that have been developed so far.…”

Section: Introductionmentioning

confidence: 99%

MATLAB/simulink study of multi-level inverter topologies using minimized quantity of switches

Krishna¹,

Prashanth²,

Sujatha³

2017

IJET

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Multilevel Inverters (MLI) have very good features when compared to Inverters. But using more switches in the conventional configuration will reduce its application in a wider range. For that reason a modified 7-level MLI Topology is presented. This new topology consists of less number of switches that can be reduced to the maximum extent and a separate gate trigger circuit. This will reduce the switching losses, reduce the size of the multilevel inverter, and cost of installation. This new topology can be used in Electrical drives and renewable energy applications. Performance of the new MLI is tested via. Total harmonic distortion. This construction structure of this multilevel inverter topology can also be increased for 9-level, 11-level and so on and simulated by the use of MATLAB/SIMULINK. A separate Carrier Based PWM Technique is used for the pulse generation in this configuration.

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Analysis of THD and output voltage performance for cascaded multilevel inverter using carrier pulse width modulation techniques

Cited by 163 publications

References 13 publications

An Improved Asymmetric Cascaded Multilevel D–STATCOM with Enhanced Hybrid Modulation

An Improved Asymmetric Cascaded Multilevel D–STATCOM with Enhanced Hybrid Modulation

Performance Evaluation on Unipolar Pwm Strategies for Three Phase Diode Clamped Multilevel Inverter

MATLAB/simulink study of multi-level inverter topologies using minimized quantity of switches

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