2013
DOI: 10.6113/jpe.2013.13.4.600
|View full text |Cite
|
Sign up to set email alerts
|

Analysis of the Admittance Component for Digitally Controlled Single-Phase Bridgeless PFC Converter

Abstract: This paper analyzes the effect of the admittance component for the digitally controlled single-phase bridgeless power factor correction (PFC) converter. To do this, it is shown how the digital delay effects such as the digital pulse-width modulation (DPWM) and the computation delays restrict the bandwidth of the converter. After that, the admittance effect of the entire digital control system is analyzed when the bridgeless PFC converter which has the limited bandwidth is connected to the grid. From this, the … Show more

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
2
1
1
1

Citation Types

0
7
0

Year Published

2014
2014
2021
2021

Publication Types

Select...
6
1

Relationship

2
5

Authors

Journals

citations
Cited by 8 publications
(7 citation statements)
references
References 23 publications
0
7
0
Order By: Relevance
“…Considering PWM modulation delay and digital control delay, 41 the transfer function of current control loop in Figure 2 can be approximated as…”
Section: Robustness Analysismentioning
confidence: 99%
“…Considering PWM modulation delay and digital control delay, 41 the transfer function of current control loop in Figure 2 can be approximated as…”
Section: Robustness Analysismentioning
confidence: 99%
“…Primary winding voltage (350V/div) Power factor correction function was implemented with repetitive control to ensure low harmonic distortion [29]- [30]. Fig.…”
Section: Afe Converter Stagementioning
confidence: 99%
“…By choosing Vdc and Mmax as 400 V and 0.9, the maximum allowable Kd is obtained as 37.34. In sum, the range of Kd considering the experimental parameters is represented as: In Figure 5, the feed-forward voltage v ff is directly added, and it compensates for the admittance effect in the entire control loop [19]. With this configuration, the voltage error e o between the voltage reference v * o and v o is characterized as follows:…”
Section: Proposed Single-loop Voltage Control Strategy With the Activmentioning
confidence: 99%
“…In Figure 5, the feed-forward voltage vff is directly added, and it compensates for the admittance effect in the entire control loop [19]. With this configuration, the voltage error eo between the voltage reference v * o and vo is characterized as follows: Figure 3.…”
Section: Proposed Single-loop Voltage Control Strategy With the Activmentioning
confidence: 99%