2013 5th IEEE International Memory Workshop 2013
DOI: 10.1109/imw.2013.6582135
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Analysis of vertical location and bandgap energy distribution of trapped charges on P-type SONOS NeoFlash<sup>&#x00AE;</sup> after program/erase cycling

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“…1(d) shows the obvious clockwise hysteresis of ZnO flash memory with different aspect ratios. The memory window of flash with 10 nm thick ZnO floating gate reaches up to 9.8V (V T = 5.8V in programming state and V T = -4V in erasing state for the TFT with the aspect ratio of 5µm/5µm) under the sweeping gate voltage from -10 V to +15 V, which greatly exceeds the traditional silicon-oxygen-nitrogenoxygen-silicon (SONOS) structure [25], [26]. It is fully proved that ZnO thin film is a very suitable material for floating gate due to its large amounts of donor-like defects providing free electronics [15].…”
Section: Resultsmentioning
confidence: 93%
“…1(d) shows the obvious clockwise hysteresis of ZnO flash memory with different aspect ratios. The memory window of flash with 10 nm thick ZnO floating gate reaches up to 9.8V (V T = 5.8V in programming state and V T = -4V in erasing state for the TFT with the aspect ratio of 5µm/5µm) under the sweeping gate voltage from -10 V to +15 V, which greatly exceeds the traditional silicon-oxygen-nitrogenoxygen-silicon (SONOS) structure [25], [26]. It is fully proved that ZnO thin film is a very suitable material for floating gate due to its large amounts of donor-like defects providing free electronics [15].…”
Section: Resultsmentioning
confidence: 93%