Analytical modeling and experimental evaluation of interconnect parasitic inductance on MOSFET switching characteristics

Xiao, Ying; Shah, Hemal; Chow, T. Paul; Gutmann, R.J.

doi:10.1109/apec.2004.1295856

Cited by 140 publications

(50 citation statements)

References 2 publications

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“…In that respect, analytical modelling [6]- [10] may be a more convenient approach as it aims at simplifying complexity and concisely describing the essential and most relevant parameter correlations. Additionally, simulations become simpler and faster, thus allowing semiconductor manufacturers to offer suitable online design tools (e.g.…”

Section: Design and Roadmap Methodologymentioning

confidence: 99%

Design and Roadmap Methodology for Integrated Power Modules in High Switching Frequency Synchronous Buck Voltage Regulators

López

Alarcón

2009

2009 Twenty-Fourth Annual IEEE Applied Power Electronics Conference and Exposition

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The proposed methodology encompasses four study phases that address the following key design aspects of integrated power modules (IPM) for voltage regulators: Fundamental switching understanding, determination of compact/accurate loss expressions and derivation of design rules, guidelines and figure of merits for converter optimisation. The applied methods are based on several modelling approaches suitable for the different study phases. The simplified loss model proves to be effective to breakdown the power losses of a state of the art IPM. Analysis of an optimised design leads to the identification of critical circuit and device parameters that may well condition the layout of future technological roadmap targets.

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Section: Design and Roadmap Methodologymentioning

confidence: 99%

Design and Roadmap Methodology for Integrated Power Modules in High Switching Frequency Synchronous Buck Voltage Regulators

López

Alarcón

2009

2009 Twenty-Fourth Annual IEEE Applied Power Electronics Conference and Exposition

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“…Besides, parasitic elements including parasitic inductances from PCB tracing, internal bonding in devices and current sensing transformer, parasitic capacitances in the MOSFET, diode and inductor can all exert influence on the switching performance. Extensive research has been conducted to study the effect of parasitic elements [8]- [14]. Some make contribution to the extraction and characterization of parasitic parameters of transformer and PCB tracing in an existent circuit by using ANSOFT or Maxwell Q3D [8]- [10].…”

Section: Introductionmentioning

confidence: 99%

Effect of parasitic elements in a power converter on the switching performance of a MOSFET-snubber-diode configuration

Wang

Chung

2011

2011 Twenty-Sixth Annual IEEE Applied Power Electronics Conference and Exposition (APEC)

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This paper presents a detailed study on the switching process of a MOSFET-snubber-diode (MSD) configuration commonly used in power converters. An analytical model which takes critical parasitic elements and the interactions between gate drive circuit and power circuit into consideration is derived to evaluate the switching characteristics. The influence of parasitic elements and important circuit components in terms of power loss, ringing effect and device stress is discussed under two different conditions for the determination of current slew rate. Based on this work, guidelines are given for the design of high-frequency switching circuits with tradeoff between power loss, oscillation and device stress. The analysis has been successfully verified by the experimental results of a 750W boost converter.

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“…Obviously, C oss and C rss change with an applied voltage. According to [26], [32], and [33], the nonlinearity of the capacitance versus the voltage can be modelled as:…”

Section: A Extraction Of Key Parametersmentioning

confidence: 99%

An Improved Analytical Model for Predicting the Switching Performance of SiC MOSFETs

Liang¹,

Zheng²,

Li³

2016

Journal of Power Electronics

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This paper derives an improved analytical model to estimate switching loss and analyze the effects of parasitic elements on the switching performance of SiC MOSFETs. The proposed analytical model considers the parasitic inductances, the nonlinearity of the junction capacitances and the nonlinearity of the trans-conductance. The turn-on process and the turn-off process are illustrated in detail, and equivalent circuits are derived and solved for each switching transition. The proposed analytical model is more accurate and matches better with experimental results than other analytical models. Note that switching losses calculated based on experiments are imprecise, because the energy of the junction capacitances is not properly disposed. Finally, the proposed analytical model is utilized to account for the effects of parasitic elements on the switching performance of a SiC MOSFET, and the circuit design rules for high frequency circuits are given.

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Analytical modeling and experimental evaluation of interconnect parasitic inductance on MOSFET switching characteristics

Cited by 140 publications

References 2 publications

Design and Roadmap Methodology for Integrated Power Modules in High Switching Frequency Synchronous Buck Voltage Regulators

Design and Roadmap Methodology for Integrated Power Modules in High Switching Frequency Synchronous Buck Voltage Regulators

Effect of parasitic elements in a power converter on the switching performance of a MOSFET-snubber-diode configuration

An Improved Analytical Model for Predicting the Switching Performance of SiC MOSFETs

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