Analytical modeling of capacitances in tunnel-FETs including the effect of Schottky barrier contacts

Compact modeling of intrinsic capacitances in Double-Gate Tunnel-FETs

“…Since in a CMOS the current is inversely proportional to l ch and in addition capacitance is directly corresponding to l ch , in this case τ ∝ l 2 ch [88]. All in all, these results demonstrate that in order to improve the dynamic performance of TFETs, their on-current must be increased, and the question arises as to how such an improvement can be achieved [76]. Studies have shown that innovative architectures of TFETs, such as those using line tunneling and hetero-structures, increase the potential to achieve a higher Ion [92].…”

“…(b) Transconductance of the ntype TFET is extracted from AC analyzes in TCAD. On the right axis the normalized value of gm regarding g d in the on-state and to g d in the ambipolar-state are shown [76].…”

“…Afterward, the Phosphor ions are implanted into the source region of this structure with an energy of 3 keV, a dose of 2 × 10 15 cm −2 and an angle of 45°. In the drain region the Boron ions are implanted with 1.5 keV, a dose of 1 × 10 15 cm −2 and an angle of 135°[75,76].…”

“…The intrinsic capacitances Cgs and C gd of the fabricated p-type planar TFET are measured by varying Vgs at different V ds[76].…”

“…In each case the semiconductor part of the diode is doped with different concentrations of Boron. Solid lines depict the diode current and the dotted lines show the small signal conductance of the diodes[76].…”