Analytical Modeling of the Suspended-Gate FET and Design Insights for Digital Logic

Abstract

The scaling of the MOSFET threshold voltage is limited by the fundamental minimum value of the subthreshold swing, 60 mV/dec at room temperature. This limits the on current as the supply voltage is reduced. Suspended-gate FET (SGFET) [1] features an extremely sharp subthreshold slope and can be used to circumvent this limitation. We present a new, analytical model for the SGFET that is suitable for hand calculations and time-efficient circuit simulations. Our model expresses the pull-in, pull-out voltages and the stable travel range in terms of the structural parameters and the moving gate position as a function of the gate voltage. Starting from our model, we discuss the influence of the structural parameters on the transistor characteristics and the potential of the SGFET for logic circuits. We also introduce the SGFET SRAM cell to demonstrate the use of our model and to illustrate the interest of the SGFET for ultra-low power applications.SGFET combines an electrostatically-actuated NEMS switch with clamped-clamped beam and an inversion-mode MOSFET (Fig. 1). When a gate voltage is applied, the air gap between the gate electrode and the gate oxide is reduced due to the charge-induced electrostatic attraction. The electrostatic force is equilibrated by the elastic force (that can be modeled by a linear spring constant, k [1]) as long as V G is lower than the pullin voltage V pi , leading to a critical gap thickness, x lim . For V G > V pi , the electrostatic component dominates the elastic component and the gate snaps down the gate oxide. When the SGFET is designed such that the mechanical pull-in occurs before the apparition of the inversion channel, extremely sharp on-off transitions become possible. Our SGFET model is therefore focused on this particular operation where the pull-in occurs in weak inversion. This implies Ψ slim < 2Φ F , where Ψ slim is the 'limit surface potential' at pull-in and Φ F is the substrate Fermi potential.Relationships for Ψ slim , x lim ,V pi and x(V G ) are derived by using the force balance equations, depletion approximation and the equation for the limit gap height given in [2] ( Table 1). The variation of the gate position as a function of the gate voltage is shown in Fig. 2, where our analytical model based on the depletion approximation is compared to the iterative solution of the force-balance equation featuring the exact charge equation. It is noticed that our analytical model is in satisfactory agreement with the numerical solution and the difference between the analytically and numerically calculated V pi is about kT/q. In Fig. 2, it can also be remarked that the SGFET exhibits hysteresis, i.e., the gate is pulled-up at a voltage V po < V pi . V po is expressed by using the force equations while the gate is in down-state and neglecting the surface adhesion forces.SGFET analytical model can be used to provide simple design guidelines. For instance a low-voltage operation requires a relatively long beam (Fig. 3a) and/or a reduced gap (Fig. 3b). On the other hand, the substr...

A Noise Immune Double Suspended Gate MOSFET for Ultra Low-Power Applications

“…For , the lower gate oxide is absent and hence, for the upper gate the device will work as a MOSFET but for lower gate it will work as a metal-metal switch. Both structures have significant improvements over [2], but the proposed one is more advantageous in terms of power dissipation and noise immunity which is discussed in later.…”

“…The doping concentration NA is 10 18 /cm 3 for both the structures. The travel range is a function of doping concentration and with larger doping concentration, it gets minimized which improves the device performance [2]. L and Tsi are chosen in such a way so that it falls under the small geometry devices.…”

“…However, this limitation can be overcome by suspended gate field effect transistor (SGFET). SGFETs are overpowering the CMOS architecture in terms of standby power consumption which is very low in the previous one [2]. Hence, the switching characteristics for SGFETs are almost ideal, therefore these can be used as sleeping transistors which leads to efficient power management.…”

“…More than 52 years ago, the idea of combining a mechanical switch, which is electrostatically actuated, with a MOSFET was introduced [3]. The motivation behind this innovative idea was to get a more stable structure which can operate more properly at high frequency [2]. This MEMS/FET hybrid structures had been implemented as gas as well pressure sensors with some eye-catching results [4,5].…”

“…However, some shortcoming of this model, such as huge time consumption as it is an iterative method, was also reported in [2]. Hence, to overcome this limitation, a static model for SGFET has been developed by considering only the operational region of interest [2]. However, this mathematical model was for a single suspended gate FET.…”