Analytical Surface Potential Modelling-Based Small Signal Analysis and RF Performance Characterization of DMG SOI MOSFET for Better RFIC Application

Malakar, Tiya Dey; Bhattacharyya, P.; Sarkar, Subir Kumar

doi:10.1080/02564602.2017.1283252

Cited by 3 publications

(1 citation statement)

References 24 publications

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“…Figure 1 depicts a cross-sectional view of NsFET, which was created using Cogenda EDA tool. Many researchers have explored to use FET for various applications [22][23][24][25][26][27][28][29][30][31]. Channel length 10 nm with Fin dimension of 10 nm along with two fin's taken for the current study.…”

Section: Methodsmentioning

confidence: 99%

Design and Analysis of Nanosheet Field-Effect Transistor for High-Speed Switching Applications

Kumar

Kumar²,

Vijayalakshmi³

et al. 2023

Journal of Nanomaterials

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Self-heating effects and short channel effects are unappealing side effects of multigate devices like gate-all-around nanowire-field-effect transistors (FETs) and fin FETs, limiting their performance and posing reliability difficulties. This paper proposes the use of the novel nanosheet FET (NsFET) for complementary metal-oxide semiconductor technology nodes that are changing. Design guidelines and basic measurements for the sub-nm node are displayed alongside a brief introduction to the roadmap to the sub-nm regime and electronic market. The device had an ION/IOFF ratio of more than 105, according to the proposed silicon-based NsFET. For low-power and high-switching applications, the results were verified and achieved quite well. When an NS width increases, although, the threshold voltage (Vth) tends to fall, resulting in a loss in subthreshold effectiveness. Furthermore, the proposed device performance, like subthreshold swing ION/IOFF, was studied with a conventional 2D FET. Hence, the proposed NsFET can be a frontrunner for ultra-low power and high-speed switching applications.

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