Analyzing the Fault Injection Sensitivity of Secure Embedded Software

Abstract

Fault attacks on cryptographic software use faulty ciphertext to reverse engineer the secret encryption key. Although modern fault analysis algorithms are quite efficient, their practical implementation is complicated because of the uncertainty that comes with the fault injection process. First, the intended fault effect may not match the actual fault obtained after fault injection. Second, the logic target of the fault attack, the cryptographic software, is above the abstraction level of physical faults. The resulting uncertainty with respect to the fault effects in the software may degrade the efficiency of the fault attack, resulting in many more trial fault injections than the amount predicted by the theoretical fault attack. In this contribution, we highlight the important role played by the processor microarchitecture in the development of a fault attack. We introduce the microprocessor fault sensitivity model to systematically capture the fault response of a microprocessor pipeline. We also propose Microarchitecture-Aware Fault Injection Attack (MAFIA). MAFIA uses the fault sensitivity model to guide the fault injection and to predict the fault response. We describe two applications for MAFIA. First, we demonstrate a biased fault attack on an unprotected Advanced Encryption Standard (AES) software program executing on a seven-stage pipelined Reduced Instruction Set Computer (RISC) processor. The use of the microprocessor fault sensitivity model to guide the attack leads to an order of magnitude fewer fault injections compared to a traditional, blind fault injection method. Second, MAFIA can be used to break known software countermeasures against fault injection. We demonstrate this by systematically breaking a collection of state-of-the-art software fault countermeasures. These two examples lead to the key conclusion of this work, namely that software fault attacks become much more harmful and effective when an appropriate microprocessor fault sensitivity model is used. This, in turn, highlights the need for better fault countermeasures for software.

Processor Extensions for Hardware Instruction Replay against Fault Injection Attacks

“…[6] assumes that a single fault only impacts a single instruction during the execution, but this is not the case. [17] and [18] show that in pipelined processors, a single fault impacts several pipeline stages and then several instructions, not only one. These software protections can be bypassed even with a single fault [19], [20], [21].i III.…”

SimpliFI: Hardware Simulation of Embedded Software Fault Attacks

“…Microarchitecture-Aware Fault Injection Attacks (MAFIA) [18] are an effort to raise the abstraction level of fault injection simulation. MAFIA first profiles the target device in simulation to learn how clock glitch attacks affect the execution of different instructions.…”

Improving Performance and Mitigating Fault Attacks Using Value Prediction

“…To provide comprehensive coverage of the attack surface, software-only mitigation techniques are insufficient [3,4,29]. This is because microarchitectural aspects of the processor such as pipeline effects, cache effects, and physical implementation are invisible to the software countermeasures.…”

“…In the evaluation we assume injection of biased faults in the loaded values, as loaded values have the largest critical section. [4] Figures 5 and 6 show the performance impact with respect to a baseline with no value prediction (and no attacks). Table 4 reports both the average speedup and the range of speedups (indicating the minimum and maximum speedups of benchmarks within each benchmark suite.)…”

“…Galathy [1] and Yuce et al [2][3][4] analyzed and demonstrated the application of biased faults to modern, pipelined microprocessors. In this model, an attacker can engineer and inject biased faults (e.g., via clock glitches of a certain intensity) that affect in-flight instructions in the pipeline.…”