Anomalous Field‐Oxide‐Ungrowth Phenomenon in Recessed Local Oxidation of Silicon Isolation Structure

Abstract

An anomalous field-oxide-growth phenomenon in a recessed local oxidation of silicon (LOCOS) structure with a nitride spacer (R-LOCOS), in which the field oxide growth at the center of the opening area is suppressed when isolation spacing is small, is reported. The field-oxide-ungrowth (FOU) phenomenon was found to have strong structural dependence, on the aspect ratio of the opening area, active pattern density, and silicon recess depth. By changing process conditions, such as dry etching and wet cleaning conditions, however the FOU was not affected. Since the tendency of the FOU occurrence was coincident with that of the microloading effect in reactive ion etching, the FOU was believed to originate from a residue on the exposed silicon surface after the etching process. When silicon was not recessed, the FOU was not observed at any of the structural variations. From a two-dimensional simulation of field oxidation, it has been found that in a nonrecessed LOCOS structure, a residue on the silicon surface does not significantly affect field oxide growth, but in the recessed LOCOS structure, field oxide growth is very sensitive to the existence of a residue on the recessed surface. Thus, to successfully use the recessed LOCOS structure with a subquarter micron design rule avoiding the occurrence of the FOU, structural factors that include an active pattern layout should be carefully chosen.

Control of the Slope of Field Oxide Edge and Its Effects on Gate Oxide Reliability

“…This structure provides short bird's beak, high volume ratio, and relatively planar field oxide topology. 1,2 elsewhere. [1][2] All field oxides were grown with a target thickness of 3000 Å.…”

“…1,2 elsewhere. [1][2] All field oxides were grown with a target thickness of 3000 Å. The pad nitride and pad oxides were removed in a hot phosphoric acid and a diluted HF solution, respectively.…”

“…The FOU exhibits strong dependence on the active area ratio (the area ratio of active to field), shape of the field region, isolation spacing, silicon recess depth, and spacer etching conditions. 1 In the memory chip, the FOU is found at the peripheral circuit regions that have a high active area ratio; however, no FOU occurs at the memory cell regions because of the active area ratio that is lower than that in the peripheral regions. We reported the mechanism of the FOU occurrence in Ref.…”

“…A number of modified local oxidation of silicon (LOCOS) structures have been used to meet the required profiles of field oxide. We reported that the recessed LOCOS with nitride spacer (R-LOCOS), [1][2] shown in Fig. 1, exhibited the suppressed bird's beak because of an oxidation blocking thin nitride spacer.…”

“…Figure 1.The schematic structure of recessed LOCOS with nitride spacer (R-LOCOS). This structure provides short bird's beak, high volume ratio, and relatively planar field oxide topology 1,2. …”