2008
DOI: 10.1109/led.2008.2005518
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Anomalous Gate-Edge Leakage Induced by High Tensile Stress in NMOSFET

Abstract: Anomalously high gate tunneling current, induced by high-tensile-stress memorization technique, is reported in this letter. Carrier-separation measurement method shows that the increased gate tunneling current is originated from the higher gate-to-source/drain (S/D) tunneling current, which worsens when channel length is getting shorter. Also, the device with enhanced tensile strain exhibits 9% higher gate-to-S/D overlapping capacitance. These data indicate that the anomalously high gate tunneling current coul… Show more

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Cited by 3 publications
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References 17 publications
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