APAC: An Accurate and Adaptive Prefetch Framework with Concurrent Memory Access Analysis

Lu, Xiaoyang; Wang, Rujia; Sun, Xian-He

doi:10.1109/iccd50377.2020.00048

“…Lee et al studied the effect of memory diversity on prefetcher parameter selection and proposed a dynamic parameter search mechanism to tune prefetch aggressiveness under various memory architectures [14]. Lu et al first proposed the pure prefetch coverage (PPC) metric, which can identify accurate prefetch coverage under the concurrent memory access model, and then proposed APAC, an adaptive prefetching framework with PPC metrics [15]. Sun et al combined prefetcher control and cache partition control in a coordinated manner and proposed a combined control strategy for the two [16].…”

Section: Prefetch Strategy and Prefetch Control Strategymentioning

confidence: 99%

A Prefetch Control Strategy Based on Improved Hill Climbing Method in Asymmetric Multi-Core Architecture

Fang

¹

,

Xu

²

,

Kong

³

et al. 2022

Preprint

0

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Cache prefetching is a traditional way to reduce memory access latency. In multi-core systems, aggressive prefetching may harm the system. In the past, prefetching throttling strategies usually set thresholds through certain factors. When the threshold is exceeded, prefetch throttling strategies will control the aggressive prefetcher. However, these strategies usually work well in homogeneous multi-core systems and do not work well in heterogeneous multi-core systems. This paper considers the performance difference between cores under the asymmetric multi-core architecture. Through the improved hill-climbing method, the aggressiveness of prefetching for different cores is controlled, and the IPC of the core is improved. Through experiments, it is found that compared with the previous strategy, the average performance of big core is improved by more than 3%, and the average performance of little cores is improved by more than 24%.

show abstract

A prefetch control strategy based on improved hill-climbing method in asymmetric multi-core architecture

Fang

¹

,

Xu

²

,

Kong

³

et al. 2023

J Supercomput

3

0

View full text Add to dashboard Cite

Cache prefetching is a traditional way to reduce memory access latency. In multi-core systems, aggressive prefetching may harm the system. In the past, prefetching throttling strategies usually set thresholds through certain factors. When the threshold is exceeded, prefetch throttling strategies will control the aggressive prefetcher. However, these strategies usually work well in homogeneous multi-core systems and do not work well in heterogeneous multi-core systems. This paper considers the performance difference between cores under the asymmetric multi-core architecture. Through the improved hill-climbing method, the aggressiveness of prefetching for different cores is controlled, and the IPC of the core is improved. Through experiments, it is found that compared with the previous strategy, the average performance of big core is improved by more than 3%, and the average performance of little cores is improved by more than 24%.

show abstract

The Memory-Bounded Speedup Model and Its Impacts in Computing

Sun

¹

,

Lu

²

2023

J. Comput. Sci. Technol.

6

0

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APAC: An Accurate and Adaptive Prefetch Framework with Concurrent Memory Access Analysis

Cited by 9 publications

References 20 publications

A Prefetch Control Strategy Based on Improved Hill Climbing Method in Asymmetric Multi-Core Architecture

A Prefetch Control Strategy Based on Improved Hill Climbing Method in Asymmetric Multi-Core Architecture

A prefetch control strategy based on improved hill-climbing method in asymmetric multi-core architecture

The Memory-Bounded Speedup Model and Its Impacts in Computing

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