Application development with the FlexWAFE real-time stream processing architecture for FPGAs

Abstract

The challenges posed by complex real-time digital image processing at high resolutions cannot be met by current state-of-the-art general-purpose or DSP processors, due to the lack of processing power. On the other hand, large arrays of FPGA-based accelerators are too inefficient to cover the needs of cost sensitive professional markets. We present a new architecture composed of a network of configurable flexible weakly programmable processing elements, Flexible Weakly programmable Advanced Film Engine (FlexWAFE). This architecture delivers both programmability and high efficiency when implemented on an FPGA basis. We demonstrate these claims using a professional next-generation noise reducer with more than 170G image operations/s at 80% FPGA area utilization on four Virtex II-Pro FPGAs. This article will focus on the FlexWAFE architecture principle and implementation on a PCI-Express board.

Towards Synthesis-Free JIT Compilation to Commodity FPGAs

“…In contrast, our overlay uses heterogeneous FUs with a flexible interconnect that is suitable for run-time [12] and Lucas et al [13] explore overlay networks of larger processing elements (CPUs), whereas we focus on smaller functional units.…”