Application Insight Through Performance Modeling

Abstract

Tuning the performance of applications requires understanding the interactions between code and target architecture. Hardware counters, present in all modern processors, can identify possible causes of performance problems and can pinpoint sections of code that execute at a low fraction of machine peak performance. However, the information provided by hardware counters is often insufficient to understand the causes of poor performance or to realistically estimate the potential for performance improvement.This thesis presents techniques to measure and model application characteristics independent of the target architecture. Using information gathered from both static and dynamic analysis, this approach not only makes accurate predictions about the behavior of an application on a target architecture for different inputs, but also provides guidance for tuning by highlighting the factors that limit performance at different points in a program. We introduce several new performance analysis metrics that estimate the maximum gain expected from tuning different aspects of an application, or from using hardware accelerator coprocessors. Our approach models the most important factors affecting application performance and provides estimates of unfulfilled performance potential due to a mismatch between an application's characteristics and the resources present on the target architecture. We model an application's instruction execution cost and memory hierarchy utilization, and we identify performance problems arising from insufficient instruction-level parallelism or poor data locality.To demonstrate the utility of this approach, this thesis presents the results of analyzing and tuning two scientific applications. For Sweep3D, a three-dimensional Cartesian geometry neutron transport code benchmark from the DOEs Accelerated Strategic Computing Initiative, our analysis identified opportunities for improvement that shortened execution time by 66% on an Itanium2-based system. For the Gyrokinetic Toroidal Code (GTC) from Princeton Plasma Physics Laboratory, a particlein-cell code that simulates turbulent transport of particles and energy in burning plasma, our techniques identified opportunities for improvement that shortened execution time by 33% on the same Itanium2 system.

Pinpointing and Exploiting Opportunities for Enhancing Data Reuse

“…The second flag indicates whether the reference is indirect with respect to that loop (i.e., the location accessed depends on a value loaded by another reference that has a non-zero stride with respect to that loop). A more detailed description of how we compute symbolic formulas is presented in [12], [14].…”

“…Second, we recover the names of data objects accessed by each reference using our symbolic formulas in conjunction with information recorded by the compiler in the executable's symbol table [12]. We say that references in a loop that access data with the same name and the same symbolic stride are related references.…”

“…In prior work we described techniques for understanding performance bottlenecks due to insufficient instruction-level parallelism [15]. When applying these techniques to GTC we identified a recurrence in a prime factor transform routine spcpft.…”

“…we must identify the factors that limit performance at each point in a program. In prior work [15] we describe techniques for understanding performance bottlenecks due to insufficient instruction level parallelism or due to a mismatch between an application's instruction mix and the type of execution units available on a target architecture. In this paper we present techniques for identifying performance bottlenecks due to poor data locality and we compute metrics that provide insight into ways of improving data reuse.…”