We fabricated a new top-gate n-type depletion-mode polycrystalline silicon (poly-Si) thin-film transistor (TFT) employing alternating magnetic-field-enhanced rapid thermal annealing. An n + amorphous silicon (n + a-Si) layer was deposited to improve the contact resistance between the active Si and source/drain (S/D) metal. The proposed process was almost compatible with the widely used hydrogenated amorphous silicon (a-Si:H) TFT fabrication process. This new process offers better uniformity when compared to the conventional laser-crystallized poly-Si TFT process, because it involves nonlaser crystallization. The poly-Si TFT exhibited a threshold voltage (V T H ) of −7.99 V at a drain bias of 0.1 V, a field-effect mobility of 7.14 cm 2 /V · s, a subthreshold swing (S) of 0.68 V/dec, and an ON/OFF current ratio of 10 7 . The diffused phosphorous ions (P + ions) in the channel reduced the V T H and increased the S value.Index Terms-Depletion mode, deposited n + a-Si, diffused phosphorous ions, field-enhanced rapid thermal annealing, polycrystalline silicon thin-film transistor (poly-Si TFT).