Application of metal, metal‐oxide, and silicon‐oxide based intermediate reflective layers for current matching in autonomous high‐voltage multijunction photovoltaic devices

Abstract

A logical next step for achieving a cost price reduction per Watt peak of photovoltaics (PV) is multijunction PV devices. In two-terminal multijunction PV devices, the photo-current generated in each subcell should be matched. Intermediate reflective layers (IRLs) are widely employed in multijunction devices to increase reflection at the interface between subcells to enhance current generation in the subcell(s) positioned before the IRL, in reference to the incident light. In this work, the results of over 65 multijunction devices are presented, in order to explore the effect of different current matching approaches. The influence of variations in absorber thickness as well as thickness variations of different IRLs based on silicon-oxide, various transparent conductive oxides (TCO), and metallic layers on all-silicon multijunction PV devices is studied. Specifically, hybrid, 2-terminal, monolithically integrated silicon heterojunction (SHJ) and thin film nanocrystalline silicon (nc-Si:H) and amorphous silicon (a-Si:H) tandem and triple junction devices are processed. Based on these experiments, certain design rules for optimal current matching operation in multijunction devices are formulated. Finally, taking these design rules into account, record allsilicon multijunction devices are processed. Conversion efficiencies close 15% and V oc ≈ 2 V are demonstrated for triple junction SHJ/nc-Si:H/a-Si:H devices. Such conversion efficiencies for a wireless, high-voltage wafer-based all-silicon 2-terminal multijunction PV device opens the way for efficient autonomous solar-to-fuel synthesis systems as well as other wireless innovative approaches in which the multijunction solar cell is used not only as a photovoltaic current-voltage generator, but also as an ion-exchange membrane, electrochemical catalysts, and/or optical transmittance filter.

The optical performance of random and periodic textured mono crystalline silicon surfaces for photovoltaic applications

“…The presence of the interference peak likely results from the bottom of the honeycomb, which appears optically flat, as indicated by the relatively large specular component in the AID measurements of T honey . A spectral shift of the interference fringes has been demonstrated, for instance, as a function of the thickness of a n-nc-SiO X :H layers positioned between two junctions [5]. The difference between simulated and experimental results is therefore likely due to a difference in layer thicknesses.…”

“…In these devices, a crystalline silicon junction is combined with additional junction(s) based on different PV technologies. However, many of these technologies, including nano-crystalline silicon [3][4][5], perovskites and C(I)GS materials [6][7][8], contain a crystalline phase which is incompatible with the relatively steep slopes of the conventional <111> crystal orientation. The formation of defective regions, or cracks, in the crystalline phase has been reported to occur in the focal point of perpendicular growth on steep features [9][10][11].…”

DIrect Sunlight into CO conversion

“…The study resulted in design rules for the integration of silicon-oxide based TRJs and provides fundamental insights into the sensitivity of the electrical performance of the TRJ's to doping concentrations, to alignment of the conduction and valence bands of consecutive sub-cells, to the nature of interface defects, to the growth of amorphous and crystalline phases and its dependence on substrate or seed layers and to the nanoscale thicknesses of the TRJ layers. Then, in [13], optimal current matching in MJ devices is investigated. Specifically, the influence was studied of variations in absorber thickness as well as thickness variations of different intermediate reflective layers based on SiOX, various transparent conductive oxides and metallic layers on all-silicon MJ PV devices.…”

“…An EQE diagram of the champion device, including all three subcells as well as the sum of three subcells and 1-R curves (dashed line) is presented. From [13] In addition to the optimization of this particular device architecture, the flexible application of earth abundant and chemically inert silicon and silicon-germanium alloys is demonstrated in two distinct device architectures, as shown in Fig. 7, combining up to 4 different junctions, yielding a relatively continuous Voc range of 0.5V to 2.8V.…”