Application of Preferential Electrochemical Etching of Silicon to Semiconductor Device Technology

Abstract

Preferential electrochemical etching of epitaxial structures has been applied to the fabrication of semiconductor devices. Preparation of thin layer devices and isolated structures is described. As an introduction to these applications, the etching of various epitaxial structures is described. Consideration is given to the manner in which the etching behavior is influenced by thermal treatment, the presence of diffusion areas, and crystal imperfections.Anodic dissolution of silicon in hydrofluoric acid has been described by several workers (1, 2). It was found by van Dijk (3) that electrochemical etching of epitaxially grown structures can be used to make thin silicon crystals. Using silicon slices of the n+n or the n+p type, the low-resistivity n + substrate can dissolve anodically and the etching process stops near the epitaxial boundary. Thin single crystals of silicon with a thickness down to 0.5# were prepared by van Dijk.This paper presents some applications of this electrochemical etching process to semiconductor technology. Before this is done, the etching behavior of homogeneously doped substrates and epitaxially grown structures will be considered in more detail. One application of the electrochemical etching process is the preparation of devices in thir~ silicon layers of high quality. These thin silicon layers can be advantageously used to make devices having improved performance. Similar devices may be made in thin silicon layers grown on sapphire, spinel, or other insulators. However, the crystal imperfections of these layers (often made by heteroepitaxial growing techniques), still limit the applications. Two new methods of preparing thin layer devices are described. In one method, lateral devices are fabricated in a thin silicon layer which is made on top of a polycrystalline silicon substrate with a SiO2 layer in between. In the second method of making thin layer devices, diffusions are carried out in the initial epitaxially grown structures, then the slice is etched, leaving a device with vertical junctions only.The electrochemical etching process can also be applied successfully in the preparation of isolated structures. A technique is presented for utilization of this process in the preparation of integrated circuits with dielectric isolation and beam lead air-gap isolation. Experimental ProcedureThe samples used consisted of homogeneously doped n-and p-type silicon slices and epitaxially grown slices with a highly doped substrate (~ 3.10 TM atoms/ cm 8) and an epitaxial layer with a dopant concentration lower than 2.1016 atoms/cm~. Both (111) and * Electrochemical Society Active Member.(100) oriented slices were used; slice diameters were between 32 and 40 ram.The homogeneously doped slices were chosen in the impurity concentration range from 1015 to 1019 atoms/ cm~. Prior to the electrochemical process, the slices were etched in HF (48%)-HNO3 (65%) (1: 10) etchant to remove work damage. Contact between the anode and the silicon was made by pressing a platinum strip (15 x 3 mm e) pressed agai...

Formation Mechanism and Properties of Electrochemically Etched Trenches in n‐Type Silicon

“…1, 1989. (2)(3)(4)(5), silicide layers on a silicon substrate can be thermally oxidized with the formation of pure SiOa, without any metal oxidation. How is this possible?…”

“…For the first case the reverse is true: if only few holes (h +) are available at the electrode surface, the trench tips are more effective in collecting them from surrounding bulk material provided a space-charge region (scr) exists. Since anodic biasing of n-type silicon always creates a space-charge region, trench formation occurs spontaneously even at polished surfaces (4)(5)(6). The first section of this work reports about this phenomenon.…”

Preferential Electrochemical Etching of P+ Silicon in an Aqueous HF-H[sub 2]SO[sub 4] Electrolyte

“…The low bias voltage employed in this etching process reduces the possibility of hole injection from the p+ layer into the n-layer and results in a more abrupt termination of the etching process; the increase in current density obtained by the addition of the H2SO4 probably provides a smoother post-etched surface condition for the n-type layer. This process has been carried out successfully under normal room illumination conditions, eliminating the complete darkness requirement mentioned by previous workers (3). 3DO A comparison has been made of the characteristics of this three component electrolyte with the traditional aqueous HF solutions.…”

“…Electrochemical polishing and preferential etching techniques and their application to thin-film silicon device technology have been described by many workers (1)(2)(3). A major difficulty encountered has been the continued formation of thick brown films on the semiconductor surface during etching under low-currentdensity conditions (1).…”

“…A major difficulty encountered has been the continued formation of thick brown films on the semiconductor surface during etching under low-currentdensity conditions (1). At the high bias voltages commonly employed to achieve sufficiently high current densities and insure the elimination of brown-film for-'mation, preferential removal of a p+ layer from a higher resistivity n layer leaves a rough surface (3) which is undesirable for device fabrication. The addition of sulfuric acid to the standard HF-H20 solution employed by most previous workers permits a reduction of the bias to less than 0.5V yet maintains a high current density.…”