2019
DOI: 10.1145/3342098
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Approximate Data Reuse-based Accelerator Design for Embedded Processor

Abstract: Due to increasing diversity and complexity of applications in embedded systems, accelerator designs tradingoff area/energy-efficiency and design-productivity are becoming a further crucial issue. Targeting applications in the category of Recognition, Mining, and Synthesis (RMS), this study proposes a novel accelerator design to achieve a good trade-off in efficiency and design-productivity (or reusability) by introducing a new computing paradigm called "approximate computing" (AC). Leveraging from the facts th… Show more

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Cited by 2 publications
(1 citation statement)
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“…Hara and Hanawa utilized field programming gate array (FPGA) flexibility to offload some tasks in an HPC application [7]. In addition, certain research works memorize the input/output of repeated computations and reuse them while allowing some accuracy degradation [11,12]. As a result, AC can be applied to various applications; however, we still need to consider the characteristics of each thread/rank in a parallel application.…”
Section: Related Workmentioning
confidence: 99%
“…Hara and Hanawa utilized field programming gate array (FPGA) flexibility to offload some tasks in an HPC application [7]. In addition, certain research works memorize the input/output of repeated computations and reuse them while allowing some accuracy degradation [11,12]. As a result, AC can be applied to various applications; however, we still need to consider the characteristics of each thread/rank in a parallel application.…”
Section: Related Workmentioning
confidence: 99%