2015
DOI: 10.1145/2786763.2694383
|View full text |Cite
|
Sign up to set email alerts
|

Architectural Support for Software-Defined Metadata Processing

Abstract: Optimized hardware for propagating and checking softwareprogrammable metadata tags can achieve low runtime overhead. We generalize prior work on hardware tagging by considering a generic architecture that supports softwaredefined policies over metadata of arbitrary size and complexity; we introduce several novel microarchitectural optimizations that keep the overhead of this rich processing low. Our model thus achieves the efficiency of previous hardwarebased approaches with the flexibility of the software-bas… Show more

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
3
1
1

Citation Types

0
11
0

Year Published

2016
2016
2024
2024

Publication Types

Select...
4
2
1

Relationship

0
7

Authors

Journals

citations
Cited by 22 publications
(11 citation statements)
references
References 55 publications
0
11
0
Order By: Relevance
“…Schemes that associate memory with metadata, like for example dynamic analysis tools [43,44,46], rely on software-based solutions instead. However, recent research on tagged-memory architectures in the system security context [8,19,45] hints that re-establishing hardware-support can considerably improve security.…”
Section: Risc-mentioning
confidence: 99%
See 3 more Smart Citations
“…Schemes that associate memory with metadata, like for example dynamic analysis tools [43,44,46], rely on software-based solutions instead. However, recent research on tagged-memory architectures in the system security context [8,19,45] hints that re-establishing hardware-support can considerably improve security.…”
Section: Risc-mentioning
confidence: 99%
“…Subsequently, many hardware-based tagged memory architectures have been developed. In particular, for DIFT, implementations range from single tag bit schemes with fixed policy (e.g., Minos [14] and CHERI [52]), over multi-bit schemes with partially configurable policy (e.g., Raksha [15], DIFT [48], DIFT with coprocessor [32]), to schemes with configurable bit width and fully programmable policy and enforcement (e.g., FlexiTaint [49], instruction-grain lifeguards [11], Harmoni [17], PUMP [19]).…”
Section: B Tagged Memory Architecturesmentioning
confidence: 99%
See 2 more Smart Citations
“…Complex tags on memory locations may also encode protection metadata for pointers in memory [29], [30], [31].…”
Section: Tagged Memorymentioning
confidence: 99%