Architecture and applications of a 100-ns CMOS VLSI digital signal processor

Abiko, S.; Hashizume, M.; Matsushita, Y.; Shinozaki, K.; Takamizawa, T.; Erskine, C.; Magar, S.

doi:10.1109/icassp.1986.1169073

Cited by 4 publications

(2 citation statements)

References 3 publications

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“…The processor can use two data memory blocks simultaneously which are addressed by individual address generators. Another processor of this generation of DSPs is the TMS32C25 [8,9], a very powerful and successful member of TMS320 family. In addition to single-cycle multiply/accumulate operation it offers 32 bit wide accumulation and external memory expansion up to 64 kwords.…”

Section: B) Second Generation Dspsmentioning

confidence: 99%

Digital Signal Processors

Mayer‐Lindenberg

2003

Dedicated Digital Processors

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Section: B) Second Generation Dspsmentioning

confidence: 99%

Digital Signal Processors

Mayer‐Lindenberg

2003

Dedicated Digital Processors

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“…in graphics and image processing) and to support high level languages such as C . Single-chip DSP solutions [2] [3][4] [5] [6] have found a wide range of applications in communications, computer and control equipment, radar, sonar, medical instrumentation, digital audio and the automotive industry, to name a few. However, various other applications remain which require floating-point arithmetic.…”

Section: Introductionmentioning

confidence: 99%

The Motorola DSP96002 IEEE Floating-point Digital Signal Processor

Sohie¹

Twenty-Second Asilomar Conference on Signals, Systems and Computers

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The Motorola DSP96002 is a general-purpose digital signal processor which implements the IEEE 754-1985 Standard for Binary Floating-point Arithmetic [I 1. Its 32-bit architecture, combined with unique enhancements for digital signal processing (DSP) applications result in a peak performance of 13.5 million instructions per second (MIPS) and 40.5 million floating-point operations per second (MFLOPS) with a 27 MHz clock. Average performance on typical benchm a r k s i s 13 MIPS and j 8 MFLOPS. The DSP96002 has extensive multiprocessing support, which allows multiple 96002's to deliver hundreds or thousands of MFLOPS in a compact, low-power system. The processor has dual external buses, each with separate 32-bit address, 32-bit data, bus control and arbitration ports. Each bus has on-chip support for multiprocessor communications, the fast access modes of DRAM/VRAM memories and interfaces to non-96002 processor buses. Based on a superset of Motorola's fixedpoint DSP56000/1 [2] the DSP96002 provides software compatibility with DSP5dOOO/l source code.. The high parallelism in the central processing unit (CPU), combined with two independent DMA contro.llers, on-board ROM and RAM, a n d 1 / 0 in a high level of integration creates a powerful single-chip computing node for parallel processing systems.

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A digital signal processor with IEEE floating-point arithmetic

Sohie

Kloker²

1988

IEEE Micro

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Architecture and applications of a 100-ns CMOS VLSI digital signal processor

Cited by 4 publications

References 3 publications

Digital Signal Processors

Digital Signal Processors

The Motorola DSP96002 IEEE Floating-point Digital Signal Processor

A digital signal processor with IEEE floating-point arithmetic

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