Architecture and implementation of an iterative receiver for MIMO systems

Abstract

In this paper, the architecture of a low complex iterative receiver for a 4 × 4 MIMO system is detailed and implementation results are analyzed. An efficient architecture of MMSE iterative receiver for MIMO-OFDM systems is proposed to limit latency and complexity of the iterative process. The implemented receiver is integrated into an hardware testbench and compared in terms of complexity and performance with a non iterative solution.Keywords-MIMO equalization, iterative receiver, hardware implementation.I. INTRODUCTION The next generation of wireless communication systems call for new advanced techniques in order to support ever-increasing data rates. By exploiting spatial diversity, multiple input multiple output (MIMO) systems position themselves as a serious candidate to increase spectral efficiency as demonstrated in [1], [2]. Likewise, OFDM is a widely used solution for highspeed wireless communications thanks to its robustness against multi-path fading by eliminating intersymbol interference (ISI). The combination of MIMO and OFDM thus presents significant interest for high data rate wireless communications. In this context, iterative receivers have been demonstrated to efficiently deal with the presence of co-antenna interference [3]. In spite of their good performance, iterative receivers are not yet widely used because of their high complexity induced by both a complex MIMO detection and a costly iterative process.In consequence solutions have firstly to be found to limit complexity of MIMO detection, where the channel has to be represented by a matrix instead of a single channel coefficient for SISO case. Optimal maximum likelihood (ML) algorithm leads to huge complexity. To limit the cost of the detection, suboptimal approaches exist based on sphere decoding or linear filtering associated with MMSE or ZF algorithms. These solutions remain complex as they have often to include matrix inversion or triangularization.Secondly, an architecture has to be defined to deal with turbo-equalization process, during which MIMO and channel decoders exchange soft information to cancel co-antenna interference. To be competitive, iterative receivers must be able to achieve equivalent data rate to system without turbo-equalization.In this paper, we present an efficient architecture of an iterative receiver for MIMO-OFDM systems. MMSE interference cancellation is considered for MIMO detection and channel coding is realized with a turbo code. Based on a FPGA implementation, a comparison is made between iterative and non iterative schemes in terms of performance and complexity.The paper is organized as follows. Section II describes the system model and the MIMO iterative receiver based on MMSE interference cancellation. In section III, the proposed architecture of the receiver is detailed. We especially focus on the computation of MMSE filtering and on the scheduling between MIMO and channel decoders, the two main challenges to solve in order to get a competitive receiver. We describe the evaluation of the hardware implem...

ASIP Design and Prototyping for Wireless Communication Applications

“…Matrix inversion through block-wise analytical method has been implemented in (Eilert et al, 2007). Two separate MMSE-IC2 equalizers for 4×4 turbo MIMO SM environment using QPSK and QAM-16 modulations, implementing CORDIC method of QR decomposition, have been proposed in (Boher et al, 2008) for fast fading applications. Using analytic method of matrix inversion, a fully dedicated architecture for MMSE-IC1 LE for 2×2 turbo MIMO system with pre-coding used in quasi static channel has been proposed in .…”

“…All of the referenced implementations present dedicated architecture for a specific system configuration except (Eilert et al, 2007) where the proposed architecture supports 2×2 and 4×4 matrix inversion. Table 4 is organized in such a way that first of all comparison is made with (Boher et al, 2008), (Kim et al, 2008) and ) which provide a complete solution to generate estimated symbol vectors. Then comparison with (Myllyla et al, 2005) (providing solution to compute only the coefficient matrix of Equation 3) is tabulated.…”

“…Furthermore, in order to make a fair comparison, the EquASIP was synthesized with the same target technology as used in the implementation with which it is being compared. The work presented in (Boher et al, 2008) is aimed at achieving fast fading 4×4 MIMO SM using MMSE-IC. This implementation uses σ 2 x = 0 in first iteration and σ 2 x = σ 2 x in later iterations to simplify the architecture.…”

“…This results in a throughput of 0.5 Mega vectors per second at considered frequency. Hence, the flexibility of EquASIP to support 5 different STC comes at the cost of 2.4 times less throughput, 53% more slice registers and 16 more dedicated multipliers compared to (Boher et al, 2008). In (Kim et al, 2008), the architecture implements 4×4 MIMO SM detector for 802.11n standard.…”

Advanced Applications of Rapid Prototyping Technology in Modern Engineering

“…Matrix inversion through block-wise analytical method has been implemented in (Eilert et al, 2007). Two separate MMSE-IC2 equalizers for 4×4 turbo MIMO SM environment using QPSK and QAM-16 modulations, implementing CORDIC method of QR decomposition, have been proposed in (Boher et al, 2008) for fast fading applications. Using analytic method of matrix inversion, a fully dedicated architecture for MMSE-IC1 LE for 2×2 turbo MIMO system with pre-coding used in quasi static channel has been proposed in (Karakolah et al, 2009).…”