2013
DOI: 10.5120/13243-0693
|View full text |Cite
|
Sign up to set email alerts
|

Area and Power Efficient Self-Checking Modulo 2^n +1 Multiplier

Abstract: Modulo 2 n +1 multiplier is the key block in the circuit implementation of cryptographic algorithm such as IDEA and also widely used in the area of data security applications such as residue arithmetic, digital signal processing, and data encryption that demands low-power, area and high-speed operation. In this paper, a new circuit implementation of an area and power efficient self-checking modulo 2 n +1 multiplier based on residue codes are proposed. Modulo 2 n +1 multiplier has the three major stages: partia… Show more

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...

Citation Types

0
0
0

Publication Types

Select...

Relationship

0
0

Authors

Journals

citations
Cited by 0 publications
references
References 8 publications
0
0
0
Order By: Relevance

No citations

Set email alert for when this publication receives citations?