Arithmetic with binary-encoded balanced ternary numbers

Parhami, Behrooz; McKeown, Michael

doi:10.1109/acssc.2013.6810470

Cited by 18 publications

(11 citation statements)

References 13 publications

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“…The simple 2-value system is not prone to error. Logic gates can produce these on-off values very easily and while a ternary gate with 3 states has been suggested [1][13] [14], it has never been implemented because of the complexity with analogue output values. In fact, it is still considered to be unworkable and some research suggests using it for special purposes only.…”

Section: Related Workmentioning

confidence: 99%

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How the Brain might use Division

Greer

2020

Wseas Transactions on Computer Research

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One of the most fundamental questions in Biology or Artificial Intelligence is how the human brainperforms mathematical functions. How does a neural architecture that may organise itself mostly throughstatistics, know what to do? One possibility is to extract the problem to something more abstract. This becomesclear when thinking about how the brain handles large numbers, for example to the power of something, whensimply summing to an answer is not feasible. In this paper, the author suggests that the maths question can beanswered more easily if the problem is changed into one of symbol manipulation and not just number counting.If symbols can be compared and manipulated, maybe without understanding completely what they are, then themathematical operations become relative and some of them might even be rote learned. The proposed systemmay also be suggested as an alternative to the traditional computer binary system. Any of the actual maths stillbreaks down into binary operations, while a more symbolic level above that can manipulate the numbers andreduce the problem size, thus making the binary operations simpler. An interesting result of looking at this is thepossibility of a new fractal equation resulting from division, that can be used as a measure of good fit and wouldhelp the brain decide how to solve something through self-replacement and a comparison with this good fit.

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Section: Related Workmentioning

confidence: 99%

“…( As all multiplications are at the unit level, they have to be carried out as whole operations, but they then replace the 'symbol' in the number that is the multiplicand. This leads to the following equation: (16)00000 + (10)0000 + (4)000 + (40)0000 + (25)000 + (10)00 + (56)00 + (35)0 + (14).…”

Section: Multiplication Example: 2507 X 852 = 2135964mentioning

confidence: 99%

How the Brain might use Division

Greer

2020

Wseas Transactions on Computer Research

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“…Over the last few years, several researches have been conducted for efficient realization of the arithmetic unit (AUs) based on ternary structures. Considering the conducted studies, the design presented in [8] used binary encoding for balanced ternary numbers and performed ternary arithmetic function directly on ternary numbers. The past history of ternary systems alongside the available and promising nanotechnologies such as carbon nanotube field-effect transistor (CNFET) and graphene nanoribbon field-effect transistors (GNRFET) and interconnects for implementing the future ternary integrated circuits [2][3][4][5][6], inspired us to continue research in the field of ternary arithmetic.…”

Section: Introductionmentioning

confidence: 99%

Fast and energy-efficient FPGA realization of RNS reverse converter for the ternary 3-moduli set {3n–2, 3n–1, 3n}

et al. 2020

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Ternary number representation has been known as one of the efficient methods for the implementation of digital systems. Employing residue number system (RNS) in ternary digital signal processing (DSP) applications could offer the advantages of ternary number representation along with further privileges such as improving parallelism and fault tolerance. Efficacious design of reverse converter as a crucial block of residue number system has always been of great interest to researchers. In this paper, an efficient reverse converter for ternary RNS with moduli set {3 n -2, 3 n -1, 3 n }, based on the mixed-radix conversion (MRC) algorithm is presented. The proposed algorithm reduces the number of adders with large bit-width and the dependencies between consecutively process blocks. The employed technique in the proposed algorithm and the reverse converter architecture improves the delay and area on the FPGA Virtex Ultrascale + family platform in 14 nm/16 nm FinFET technology as compared to the related works.

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“…Before proceeding with the main topic of truncated multiplication, we should note that the implementation of radix-3 arithmetic with its three-valued digits does not necessarily entail using ternary logic [14], in the same way that decimal or other higher-radix arithmetic systems do not necessitate the use of ten-valued or other non-standard signalling and logic devices. Even though ternary logic is a good match to the digit set used in balanced ternary arithmetic, implementations with binary logic are likely to be more practical and cost-effective in the near future.…”

Section: Introductionmentioning

confidence: 99%

Truncated ternary multipliers

Parhami¹

2015

IET Computers & Digital Techniques

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Balanced ternary number representation and arithmetic, based on the symmetric radix-3 digit set {−1, 0, +1}, has been studied at various times in the history of computing. Among established advantages of balanced ternary arithmetic are representational symmetry, favourable error characteristics and rounding by truncation. In this study, we show an additional advantage: that of lower-error truncated multiplication with the same relative cost reduction as in truncated binary multipliers.

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Arithmetic with binary-encoded balanced ternary numbers

Abstract: Abstract

Cited by 18 publications

References 13 publications

How the Brain might use Division

How the Brain might use Division

Fast and energy-efficient FPGA realization of RNS reverse converter for the ternary 3-moduli set {3n–2, 3n–1, 3n}

Truncated ternary multipliers

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