2012 7th International Microsystems, Packaging, Assembly and Circuits Technology Conference (IMPACT) 2012
DOI: 10.1109/impact.2012.6420249
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Assembly and reliability assessment of 50µm-thick chip stacking by wafer-level underfill film

Abstract: In order to meet the demands of high-performance, high-speed, small form factor and multi-function integration in portable electronic products, the development of packaging technology now trends toward system-in-package (SiP) technology. Three-dimension (3D) integrated circuit technology provides a way to integrate complex micro systems through vertical interconnections among individual devices/chips. For the multi-chip stacking with fine gap and fine pitch solder micro bump interconnection, the dispensing of … Show more

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