Assertion based verification using PSL-like properties in Haskell

Uchevler, Bahram N.; Svarstad, Kjetil

doi:10.1109/ddecs.2013.6549828

Cited by 7 publications

(2 citation statements)

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“…Other research studies have been proposed for the specification of software systems using formal methods. Model verification activity 19 is performed to ensure the correctness of model. Formal verification means that any errors found in the design of the system should be corrected.…”

Section: Architecture Refinementmentioning

confidence: 99%

A model transformation approach for multiscale modeling of software architectures applied to smart cities

Khlif

Kacem

Eichler

et al. 2021

Concurrency and Computation

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Modeling and specifying correct software systems is a challenging task that can be supported by providing appropriate modeling abstractions. This article proposes an approach for graphical multiscale modeling of such systems using model transformation techniques. The approach is founded on a guided rule-based iterative modeling process ensuring controlled transition from a coarse-grained description to a fine-grained description. It provides also user-friendly graphical descriptions by extension of UML notations, hence preserving the common practices from software architectures design. The iterative design process is supported by a set of model transformation rules. The rules manage the refinement process (by adding or removing subsystems or by adding or removing details on a given subsystem) as a model transformation. Our approach is supported by a rule-based generator that implements the automatic transformation of UML diagrams into Event-B specifications allowing formal verification of their correctness properties, and relieving software architects of mastering formal techniques. To experiment and validate our approach, we consider a case study dedicated to the smart cities.

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Section: Architecture Refinementmentioning

confidence: 99%

A model transformation approach for multiscale modeling of software architectures applied to smart cities

Khlif

Kacem

Eichler

et al. 2021

Concurrency and Computation

View full text Add to dashboard Cite

show abstract

“…[7][8][9][10]). However, very few efforts [11][12][13][14] have been made to represent the dynamic verification aspects at higher abstraction level. Consequently, system design has been developed through MBSE and a separate approach is developed for dynamic design verification.…”

Section: Introductionmentioning

confidence: 99%

Expressing embedded systems verification aspects at higher abstraction level — SystemVerilog in Object Constraint Language (SVOCL)

Rashid

Anwar²,

Azam

2016

2016 Annual IEEE Systems Conference (SysCon)

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In Model Based System Engineering (MBSE), structural and behavioral aspects of the system are modeled at higher abstraction level. However, verification aspects such as assertions based verification are generally treated at lower abstraction level, resulting in a reduced design productivity. This paper presents an approach to represent SystemVerilog assertions at higher abstraction level along with structural and behavioral aspects by proposing SVOCL (SystemVerilog in Object Constraint Language). The proposed OCL extension allows to represent verification aspects such that the minimum transformation efforts are required due to its close SystemVerilog semantics. Traffic light controller serves as a case study.

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