2021
DOI: 10.1038/s41565-021-00904-5
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Atomically sharp interface enabled ultrahigh-speed non-volatile memory devices

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Cited by 146 publications
(229 citation statements)
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“…By employing the high-quality interface and suitable band offset of vdW heterostructures (vdWHs), around 20 ns writing/erasing speed has been recently achieved in the vdWH based floating gate transistors (FGT), which is orders of magnitude faster than that of the traditional silicon-based floating gate devices (Fig. 26a) [791][792][793] . When such atomically thin 2D materials based floating gate transistor is used as the memory element, it is suitable for designing a programmable inverter and implementing more complex programmable logic circuits for future low-power electronics 794 .…”
Section: Neuromorphic Computingmentioning
confidence: 99%
“…By employing the high-quality interface and suitable band offset of vdW heterostructures (vdWHs), around 20 ns writing/erasing speed has been recently achieved in the vdWH based floating gate transistors (FGT), which is orders of magnitude faster than that of the traditional silicon-based floating gate devices (Fig. 26a) [791][792][793] . When such atomically thin 2D materials based floating gate transistor is used as the memory element, it is suitable for designing a programmable inverter and implementing more complex programmable logic circuits for future low-power electronics 794 .…”
Section: Neuromorphic Computingmentioning
confidence: 99%
“…The charge density N stored in the floating gate can be calculated by N=ΔV×Cq where C is the capacitance between the floating gate and the control gate, and q is the elementary charge. [ 14 ] The C could be obtained by the formula C=ε0×εnormalrd where ε 0 is the vacuum permittivity, and ε r and d are the relative dielectric constant and the thickness of SiO 2 dielectric layer (ε r = 3.5, d = 300 nm). At V g‐max = 60 V, the Δ V value is 78 V and the storage charge density in the floating gate reaches 5.6 × 10 12 cm –2 , which can easily meet the practical storage requirements, [ 28 ] indicating the good charge‐storage capacity of the MBR device under illumination.…”
Section: Resultsmentioning
confidence: 99%
“…Operation speed, specifically the write speed, is another important parameter that limits the application of FGNVM. [ 14 ] In recent years, a few 2D vdW materials are used as the charge‐storage layer in non‐volatile memory. However, most of the memory devices show slow operation speed (Table S1, Supporting Information).…”
Section: Resultsmentioning
confidence: 99%
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“…To address this vital bottleneck, Wu et al successfully constructed atomically sharp interface contacts between 2D InSe and hBN by the vdWs forces very recently (Figure 5f). [130] As shown in Figure 5g, such a nonvolatile floating gate memory implements the nanosecond time (≈20 ns) reading and writing, extremely high erase/write ratio (≈10 10 ), and very long storage time (10 years). This work lays a foundation for further investigation vdWs flat contact to achieve high-performance electronic properties.…”
Section: B) Typical Forming Processes In 15-18-layer H-bn-based Verti...mentioning
confidence: 99%