Au-free CMOS-compatible AlGaN/GaN HEMT processing on 200 mm Si substrates

Jaeger, B. De; Hove, M. Van; Wellekens, D.; Kang, Xiaoning; Liang, Hongbin; Mannaert, G.; Geens, Karen; Decoutere, Stefaan

doi:10.1109/ispsd.2012.6229020

Cited by 86 publications

(46 citation statements)

References 6 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…Having both high-power-high-frequency AlGaN/GaN HEMTs and established Si complementary metaloxide semiconductor (CMOS) devices in a single chip would open up many new applications [1]. It would also allow costeffective large-scale fabrication of complex system by building on existing silicon technology and infrastructure, including the use of 300 mm wafers [2]. However, the market adoption of such a technology is still limited due to concerns about HEMT device reliability [3].…”

Section: Introductionmentioning

confidence: 99%

Origin of physical degradation in AlGaN/GaN on Si high electron mobility transistors under reverse bias stressing

Sasangka

Syaranamual

Gan

et al. 2015

2015 IEEE International Reliability Physics Symposium

View full text Add to dashboard Cite

We have investigated the role of threading dislocations in pit formation during stressing of AlGaN/GaN on Si high electron mobility transistors under high reverse bias. Upon stressing, the drain current saturation (I D-saturation ) decreases over time. The amount of I D-saturation degradation correlates well with pit formation at the gate-edge, where the electric field is the highest. Using a transmission electron microscope weak-beam technique, it is found that pits tend to nucleate at threading dislocations that have a screw component, even when these dislocations are at locations away from the gate-edge. An explanation based on an electrochemical oxidation model is proposed.

show abstract

Section: Introductionmentioning

confidence: 99%

Origin of physical degradation in AlGaN/GaN on Si high electron mobility transistors under reverse bias stressing

Sasangka

Syaranamual

Gan

et al. 2015

2015 IEEE International Reliability Physics Symposium

View full text Add to dashboard Cite

show abstract

“…1~3 V), the high cost and small diameter of GaN/SiC/sapphire substrates could be the obstacle of GaN power diode to mass production and commercialization [2]- [6]. On the other hand, the low cost GaN-on-Si wafer up to 8-inch is already available and the CMOS compatible process has been successfully demonstrated in [7] paving the way for a high performance and cost effective solution. Moreover, lateral diode based on AlGaN/GaN-on-Si platform is compatible with AlGaN/GaN HEMTs/MISHEMTs and also can be integrated with Si MOSFETs [8], [9], which bodes well for versatile and compact GaN power ICs.…”

Section: Introductionmentioning

confidence: 99%

Over 1.1 kV breakdown low turn-on voltage GaN-on-Si power diode with MIS-Gated hybrid anode

Zhou

Jin

Mou

et al. 2015

2015 IEEE 27th International Symposium on Power Semiconductor Devices &Amp; IC's (ISPSD)

View full text Add to dashboard Cite

An AlGaN/GaN lateral power diode on Si substrate with recessed Metal/Al 2 O 3 /III-Nitride (MIS) Gated hybrid anode (MG-HAD) for improved forward conduction and reverse blocking has been realized. The low turn-on voltage of 0.6 V with good uniformity for the fabricated 189 devices is obtained. In comparison with the conventional device, the forward current at 2 V was increased by 5 times that leading to a 51% reduction in specific ON-resistance (R ON,SP ). The incorporation of high-k dielectric in the recessed gate region enabling 2-order lower reverse leakage comparing with the conventional device, leading to a high breakdown voltage over 1.1 kV at leakage current as low as 10 μA/mm in the MG-HAD with anode-to-cathode distance (L D ) of 20 μm. The strong reverse blocking over 600 V was still achieved at 150 o C. The proposed diode is compatible with GaN normally-off MIS high-electron-mobility transistors (MISHEMTs), revealing its great potential for highly efficient GaN-on-Si power ICs. Keywords-GaN; diode; hybrid anode; high breakdown voltage; low turn-on voltage; high temperature I. 978-1-4799-6261-7/15/$31.00 ©2015 IEEE

show abstract

“…A single chip E-mode GaN MOS-FET is expected as a simple solution for power applications. However, an E-mode MOS device structure and process are still under development [4,5,6] . There were no reports on high-efficient power switching system at high frequency using E-mode GaN MOS-FET.…”

Section: Introductionmentioning

confidence: 99%

Enhancement-mode GaN-on-Si MOS-FET using Au-free Si process and its operation in PFC system with high-efficiency

Miyamoto

Okamoto

Kawaguchi

et al. 2015

2015 IEEE 27th International Symposium on Power Semiconductor Devices &Amp; IC's (ISPSD)

View full text Add to dashboard Cite

We have developed an enhancement-mode GaNon-Si MOS-FET with a thin GaN channel (40nm) on a thick AlGaN back barrier layer (1um), using Au-free 150-mm Si process. The developed device showed a threshold voltage Vt of 1.1 V, an on-resistance Ron of 5.4 mΩcm2 and a breakdown voltage BV of 730 V. The developed E-mode GaN MOS-FETs demonstrated the potential for compact and efficient power electronics. A Power Factor Correction (PFC) circuit using the packaged GaN device (20A, 650V) operated with high efficiency of > 94 % at Pout=300 W, Vout=390 V and f SW =300 kHz.

show abstract

Au-free CMOS-compatible AlGaN/GaN HEMT processing on 200 mm Si substrates

Cited by 86 publications

References 6 publications

Origin of physical degradation in AlGaN/GaN on Si high electron mobility transistors under reverse bias stressing

Origin of physical degradation in AlGaN/GaN on Si high electron mobility transistors under reverse bias stressing

Over 1.1 kV breakdown low turn-on voltage GaN-on-Si power diode with MIS-Gated hybrid anode

Enhancement-mode GaN-on-Si MOS-FET using Au-free Si process and its operation in PFC system with high-efficiency

Contact Info

Product

Resources

About