Auto-reconfiguration on self-organized intelligent platform

An end user platform for implementing artificial neutron networks on FPGA

“…To sustain that, the first step was to create a hardware implementable neural network with on-chip learning capability and a NN with node parallelism topology was chosen. The second step is to consider the auto-reconfigurability in real time and run-time ability, shown by FPGA circuits, and presented in different papers [5], [13]. Considering that, this can be one way to make steps towards a "more like brain" computational machine, in terms of adaptability and quick response, a system that makes its own choices (upon an implemented algorithm), i.e.…”

“…Taking advantage of the newly all programmable systems on chip devices, highly complex algorithms implemented in the embedded processors combined with the FPGA massive parallelism computation capability have been developed, [5] and [6].…”

Wireless Network for Self-Reconfigurable Hardware Nodes

“…The evolution of networked systems based selforganization concepts are studied with the objective to give more autonomy and computing power [1]. The Selforganization can be describe as a dynamical and adaptive process where systems acquire and maintain structure themselves, without external control [2].…”

“…This association is defined as follows: A RSS is a modular and complex system based on reconfigurable hardware technology. It is able to organize and restructure its own activity without external influences, but by the interactions of its intelligent nodes (defined as Reconfigurable System Nodes -RSNs) [1]. Essential resources that must be available on each node of a distributed cooperative system are minimal local computation power, resources management, the ability to communicate and distribute or gather tasks in the network.…”