Automatic aspectization of systemC

Tabakov, Deian; Vardi, Moshe Y.

doi:10.1145/2162024.2162029

Cited by 9 publications

(9 citation statements)

References 24 publications

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“…There has been a lot of work on the formalization of SystemC. [42][43][44][45][46] In general, the goal of the formalization process is to extract a formal model from a SystemC program, so that tools like model checkers can be applied. For example, Zeng et al in Zeng and Zhang 44 translate a subset of the operational semantics of SystemC as a guarded assignment system and use this translated model as an input for symbolic executors and checkers.…”

Section: Related Workmentioning

confidence: 99%

Formal verification of probabilistic SystemC models with statistical model checking

Ngo

Legay

2017

J Software Evolu Process

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SUMMARYTransaction-level modeling with SystemC has been very successful in describing the behavior of embedded systems by providing high-level executable models, in which many of them have inherent probabilistic behaviors, e.g., random data and unreliable components. It thus is crucial to have both quantitative and qualitative analysis of the probabilities of system properties. Such analysis can be conducted by constructing a formal model of the system under verification and using Probabilistic Model Checking (PMC). However, this method is infeasible for large systems, due to the state space explosion. In this article, we demonstrate the successful use of Statistical Model Checking (SMC) to carry out such analysis directly from large SystemC models and allow designers to express a wide range of useful properties. The first contribution of this work is a framework to verify properties expressed in Bounded Linear Temporal Logic (BLTL) for SystemC models with both timed and probabilistic characteristics. Second, the framework allows users to expose a rich set of user-code primitives as atomic propositions in BLTL. Moreover, users can define their own fine-grained time resolution rather than the boundary of clock cycles in the SystemC simulation. The third contribution is an implementation of a statistical model checker. It contains an automatic monitor generation for producing execution traces of the model-under-verification (MUV), the mechanism for automatically instrumenting the MUV, and the interaction with statistical model checking algorithms.

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Section: Related Workmentioning

confidence: 99%

Formal verification of probabilistic SystemC models with statistical model checking

Ngo

Legay

2017

J Software Evolu Process

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“…The resulting feature localization is able to locate features not only in the source code, but is also able to pinpoint object instances that are responsible for triggering these features. CHIMP (CHIMP Handles Instrumentation for Monitoring of Properties) [ 28 ] is a tool that monitors temporal SystemC properties. The basic approach in this case is that certain properties are hard to describe with standard C++ assertions (especially properties relying on temporal relations), and custom property checkers are hard to embed into existing code bases.…”

Section: Aspect-oriented Analysismentioning

confidence: 99%

“…CHIMP (CHIMP Handles Instrumentation for Monitoring of Properties) [ 28 ] is a tool that monitors temporal SystemC properties. The basic approach in this case is that certain properties are hard to describe with standard C++ assertions (especially properties relying on temporal relations), and custom property checkers are hard to embed into existing code bases.…”

Section: Aspect-oriented Analysismentioning

confidence: 99%

Analyzing SystemC Designs: SystemC Analysis Approaches for Varying Applications

Stoppe

Drechsler

2015

Sensors

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The complexity of hardware designs is still increasing according to Moore's law. With embedded systems being more and more intertwined and working together not only with each other, but also with their environments as cyber physical systems (CPSs), more streamlined development workflows are employed to handle the increasing complexity during a system's design phase. SystemC is a C++ library for the design of hardware/software systems, enabling the designer to quickly prototype, e.g., a distributed CPS without having to decide about particular implementation details (such as whether to implement a feature in hardware or in software) early in the design process. Thereby, this approach reduces the initial implementation's complexity by offering an abstract layer with which to build a working prototype. However, as SystemC is based on C++, analyzing designs becomes a difficult task due to the complex language features that are available to the designer. Several fundamentally different approaches for analyzing SystemC designs have been suggested. This work illustrates several different SystemC analysis approaches, including their specific advantages and shortcomings, allowing designers to pick the right tools to assist them with a specific problem during the design of a system using SystemC.

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“…From this point of view aspects can be seen as a way of inserting wrappers into the transaction path. Aspect C++ [25] is an aspect-oriented extension of C and C++ languages and is widely used to add aspects to SystemC descriptions [26,27].…”

Section: Papermentioning

confidence: 99%

Runtime Instrumentation of SystemC/TLM2 Interfaces for Fault Tolerance Requirements Verification in Software Cosimulation

Silva

Parra

Polo

et al. 2014

Modelling and Simulation in Engineering

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This paper presents the design of a SystemC transaction level modelling wrapping library that can be used for the assertion of system properties, protocol compliance, or fault injection. The library uses C++ virtual table hooks as a dynamic binary instrumentation technique to inline wrappers in the TLM2 transaction path. This technique can be applied after the elaboration phase and needs neither source code modifications nor recompilation of the top level SystemC modules. The proposed technique has been successfully applied to the robustness verification of the on-board boot software of the Instrument Control Unit of the Solar Orbiter’s Energetic Particle Detector.

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Automatic aspectization of systemC

Cited by 9 publications

References 24 publications

Formal verification of probabilistic SystemC models with statistical model checking

Formal verification of probabilistic SystemC models with statistical model checking

Analyzing SystemC Designs: SystemC Analysis Approaches for Varying Applications

Runtime Instrumentation of SystemC/TLM2 Interfaces for Fault Tolerance Requirements Verification in Software Cosimulation

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