Automatic Handling of Conflicts in Synchronous Interpreted Time Petri Nets Implementation

Abstract

Several solutions for implementing Petri net models on FPGA thanks to a transformation in a VHDL code have been proposed in literature. But none deals with the management of transition conflicts in the specific case of synchronous implementation of interpreted Petri nets. This article presents an automatic method to deal with conflicts from their detection to their implementation on FPGA. One solution for binary Petri nets is proposed. For the generalized case, two solutions are proposed and experimentally compared. Thus a solution is provided for the implementation of interpreted generalized time Petri nets.

Interpreted synchronous extension of time Petri nets

“…This article completes earlier works: a first definition of the formalism and the semantics of GEISPrT PN has been given in Leroux et al (2013Leroux et al ( , 2015 1 , but here these definitions have been refined with the consideration of the clock falling edge events (expressing the synchronous aspect) and the explicit management of the interpretation. This semantics is therefore more precise, which was necessary to perform the formal proof of the semantics behavior preservation.…”

“…Conflict resolution can be done with probabilities, alternated firing, or priorities (David and Alla (2010)). In Leroux et al (2014) we propose a solution based on priorities, describing the conflict problematic, how to detect them, and how to manage conflicts in our synchronous VHDL implementation context.…”

Handling Exceptions in Petri Net-Based Digital Architecture: From Formalism to Implementation on FPGAs

“…5). Conflicts are solved by means of priorities given to transitions as detailed in [34]. When there is a conflict, transitions to be fired are chosen and fired during 4 , depending on their respective priorities.…”