Automatic Parallelization: An Overview of Fundamental Compiler Techniques

Midkiff, Samuel P.

doi:10.2200/s00340ed1v01y201201cac019

Cited by 27 publications

(25 citation statements)

References 183 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…If yes, it will branch directly to the loop body started at line 22. Otherwise, it will increment the profile counter as in (lines [16][17][18][19][20][21] Actually, the instrumentation phase is not handled concurrently with the loop analysis phase for two reasons. First, the loop instrumentation process requires inserting extra instructions to handle the increment of counters.…”

Section: Instrumentation Phasementioning

confidence: 99%

See 1 more Smart Citation

A lightweight incremental analysis and profiling framework for embedded devices

Elshobaky

El-Mahdy

Rohou

et al. 2014

Proceedings of the 17th International Workshop on Software and Compilers for Embedded Systems

View full text Add to dashboard Cite

International audienceEmbedded systems such as mobile devices are currently ubiquitous. The performance potential of these devices is rapidly improving by incorporating multi-core and GPU technologies, and is rapidly catching up with the workstation platforms. Nevertheless, the heterogeneity of the underlying hardware as well as the low-power constraints severely limit performance portability. In this paper we consider the case of leveraging JIT compilers to provide portable parallelization while hiding the corresponding expensive runtime analysis. We propose a novel lightweight JIT framework that exploits the device idle time and the large storage space generally available on these devices. The framework performs 'incremental' analysis while the processor is idle (such as during charging time), and exploits the storage space to cache intermediate analysis results. Such approach requires reengineering existing complex optimization analysis methods. For this paper, we focus on the traditional loop parallelization analysis, and implement a working prototype into the LLVM framework, integrating a lightweight dynamic profiling method to identify hotspots. Initial results demonstrate the low overhead of our method for parallelizing simple loops on an embedded GPU

show abstract

Section: Instrumentation Phasementioning

confidence: 99%

“…In such concept, the GPU can handle complicated computation on data stream model. This programming model is called SPMD (Single Program Multiple Data) [17]. Where, the SPMD execution consists of multiple copies of the same program each independently executes against its own data set.…”

Section: Figure 6: Ir Code Of Instrumentation With Runtime Checksmentioning

confidence: 99%

A lightweight incremental analysis and profiling framework for embedded devices

Elshobaky

El-Mahdy

Rohou

et al. 2014

Proceedings of the 17th International Workshop on Software and Compilers for Embedded Systems

View full text Add to dashboard Cite

show abstract

“…Flow-sensitivity helps particularly in the case of loops, for instance, where a load and store may only alias across iterations of some outer loop, or where a store and load may alias only when the store comes before the load inside the same iteration. Such loop-level aliasing information is a common feature of auto-parallelizing compilers [15], and although forthcoming in LLVM, it is not currently supported. LOOP-OPT.…”

Section: Increasing Path Lengthmentioning

confidence: 99%

“…However, programs written for general purpose processors-particularly those written in an objectoriented style with frequent updates to object member variables in heap memory-do not generally have such large regions. These programs often contain many ambiguous "may-alias" memory references of the same variety as those that inhibit automatic parallelization by compilers [15]. For these programs, the semantically idempotent regions are not generally large enough to usefully amortize the register pressure overheads of preserving their idempotence throughout the compilation process.…”

Section: Decreasing Path Lengthmentioning

confidence: 99%

Idempotent code generation: Implementation, analysis, and evaluation

Kruijf

Sankaralingam

2013

Proceedings of the 2013 IEEE/ACM International Symposium on Code Generation and Optimization (CGO)

View full text Add to dashboard Cite

Leveraging idempotence for efficient recovery is of emerging interest in compiler design. In particular, identifying semantically idempotent code and then compiling such code to preserve the semantic idempotence property enables recovery with substantially lower overheads than competing software techniques. However, the efficacy of this technique depends on application-, architecture-, and compiler-specific factors that are not well understood.In this paper, we develop algorithms for the code generation of idempotent code regions and evaluate these algorithms considering how they are impacted by these factors. Without optimizing for these factors, we find that typical performance overheads fall in the range of roughly 10-15%. However, manipulating application idempotent region size typically improves the run-time performance of compiled code by 2-10%, differences in the architecture instruction set affect performance by up to 15%, and knowing in the compiler whether control flow side-effects can or cannot occur can impact performance by up to 10%.Overall, we find that, with small idempotent region and careful architecture-and application-specific tuning, it is possible to bring compiler performance overheads consistently down into the single-digit percentage range. The absolute best performance occurs when constructing the largest possible idempotent regions; to this end, however, better compiler support is needed. In the interest of spurring development in this area, we open-source our LLVM compiler implementation and make it available as a research tool.

show abstract

“…In a loop, the cyclically dependent statements form a Strongly Connected Component or an SCC[20]. Statements in an SCC cannot therefore be separated (distributed) in different loops.…”

mentioning

confidence: 99%

Improving compiler scalability: optimizing large programs at small price

Mehta

Yew

2015

Proceedings of the 36th ACM SIGPLAN Conference on Programming Language Design and Implementation

View full text Add to dashboard Cite

Compiler scalability is a well known problem: reasoning about the application of useful optimizations over large program scopes consumes too much time and memory during compilation. This problem is exacerbated in polyhedral compilers that use powerful yet costly integer programming algorithms to compose loop optimizations. As a result, the benefits that a polyhedral compiler has to offer to programs such as real scientific applications that contain sequences of loop nests, remain impractical for the common users.In this work, we address this scalability problem in polyhedral compilers. We identify three causes of unscalability, each of which stems from large number of statements and dependences in the program scope. We propose a one-shot solution to the problem by reducing the effective number of statements and dependences as seen by the compiler. We achieve this by representing a sequence of statements in a program by a single super-statement. This set of super-statements exposes the minimum sufficient constraints to the Integer Linear Programming (ILP) solver for finding correct optimizations. We implement our approach in the PLuTo polyhedral compiler and find that it condenses the program statements and program dependences by factors of 4.7x and 6.4x, respectively, averaged over 9 hot regions (ranging from 48 to 121 statements) in 5 real applications. As a result, the improvements in time and memory requirement for compilation are 268x and 20x, respectively, over the latest version of the PLuTo compiler. The final compile times are comparable to the Intel compiler while the performance is 1.92x better on average due to the latter's conservative approach to loop optimization.

show abstract

Automatic Parallelization: An Overview of Fundamental Compiler Techniques

Cited by 27 publications

References 183 publications

A lightweight incremental analysis and profiling framework for embedded devices

A lightweight incremental analysis and profiling framework for embedded devices

Idempotent code generation: Implementation, analysis, and evaluation

Improving compiler scalability: optimizing large programs at small price

Contact Info

Product

Resources

About