Proceedings of the 2nd ACM/SPEC International Conference on Performance Engineering 2011
DOI: 10.1145/1958746.1958816
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Automatic performance model synthesis from hardware verification models

Abstract: Performance models are typically written by hand for a new model or assembled piece-meal from the prior simulation code of an old model. In either case, many man-months of work may be required to write the new model and validate design details against a prior or current design. In reality, the majority of information about the performance of the design already exists in the design structure of either the old hardware model or the new model or both.To harvest this information and eliminate the significant dupli… Show more

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