2010 International Symposium on System on Chip 2010
DOI: 10.1109/issoc.2010.5625531
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Automatic selection of efficient observability points in combinational gate level circuits using particle swarm optimization

Abstract: The ever-increasing size of digital circuits makes the process of testing such designs more complex everyday. This complexity leads to more complicated logic cones, which results in harder to control and observe nodes in digital circuits. Reduced controllability and observability will decrease circuit's fault coverage, resulting in harder to test circuits.Addition of test points, which enables us to control and observe nodes, can give the test engineer direct access to these locations. From another perspective… Show more

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