Automatic Vehicle Identification and Recognition using CNN Implemented on PYNQ Board

Veldurthi, Manasa; Devi, Dharmavaram Asha

doi:10.1109/iceca55336.2022.10009054

Cited by 4 publications

(2 citation statements)

References 20 publications

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“…To check the FPAU functionality, ARM 9 dual core processor is used and is known as Processing System (PS). These PL and PS are sandwiched on a single chip known as Zynq architecture [21] & [22]. The processing is done with SDK software environment and Zed board.…”

Section: Methodsmentioning

confidence: 99%

Custom Ip Design and Verification for Ieee754 Single Precision Floating Point Arithmetic Unit

Dharmavaram,

2024

AEJ

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The compact and accurate way of representing numbers in a wide range is the advantage of floating-point (FP) representation and computation. The floating-point digital signal processors offer the IPs that should have the features of low power, high performance, and less area in cost-effective designs. The proposed paper demonstrates the design and implementation of a 32-bit floating-point arithmetic unit (FPAU). The arithmetic operations performed by the FPAU are in the IEEE 754 single precision format for FP numbers. Before performing the 32-bit FP arithmetic operations, the input operands are converted to IEEE 754 single precision. In order to make use of this functional unit in the processor designs, the proposed work discuss about the creation of custom IP. The validation and verification of this IP will be done with the Xilinx Vivado Design software. Here, the verification is performed with VIO hardware debug IP and Zed board. This FPAU IP can be used in DSP applications and can also be used as a floating-point arithmetic block in semi-custom microprocessor and microcontroller designs.

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Section: Methodsmentioning

confidence: 99%

Custom Ip Design and Verification for Ieee754 Single Precision Floating Point Arithmetic Unit

Dharmavaram,

2024

AEJ

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“…The proposed methodology in [5] shows the plate recognition of vehicles by using CNN, implemented on the PYNQ-Z2 board. This shows how machine learning can be integrated with image processing and can be implemented on FPGAs for efficient real-time applications.…”

Section: Literature Surveymentioning

confidence: 99%

Design and Implementation of Image Processing Application with Zynq SoC

Devi,

Kathula,

Kalluri

et al. 2023

IJCDS

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Human brains can depict images much easier than texts and images convey a lot more information that is the reason why images are used as branding and advertisements. Digital image processing is the major technology that needs more simple algorithms to implement. In this paper, we implemented Image processing operations like Brightness, Inversion, and Threshold operations on FPGA using the Xilinx Vivado tool. The prototype verification is done with Zynq processing system (ZPS) interfaced with OLEDrgb peripheral module in Xilinx and Software Development Kit (SDK) tool environment. The proposed design is Zynq architecture based technology that is efficient for real-time embedded applications because of the ARM9 processing system with Software Development Kit is used for application software. The advantage of the proposed system is power efficient, high performance and flexible enhancement of the functionalities because of the re-configurable Zynq SoC.

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