Autoscan: a scan design without external scan inputs or outputs

Abstract

We propose a design-for-testability technique for synchronous sequential circuits called autoscan. Autoscan uses scan chains similar to conventional scan. However, it gives up the external scan inputs and outputs in order to eliminate the test data volume associated with them. Scan operations under autoscan improve the circuit testability by allowing the circuit state to be modified through shifting. Due to the removal of the scan inputs and outputs, synthesis of scan chains under autoscan does not have to satisfy all the constraints imposed on conventional scan chains. We describe a synthesis procedure for autoscan chains, and demonstrate that autoscan allows us to detect almost all the faults that are detectable using conventional scan. We use random sequences in order to show that sequential test generation is not necessary under autoscan. We also describe a test generation procedure, and discuss the effect of autoscan on fault diagnosis.

A Hybrid Test Architecture to Reduce Test Application Time in Full Scan Sequential Circuits

“…Another approach [10] focuses to find a minimum set of segments in the LFSR sequence, where each segment corresponds to a consecutive subsequence of useful test patterns. Another design-for-testability (DFT) technique employed to eliminate test data volume and to reduce test application time in a synchronous sequential circuit is the use of autoscan [12], [13], which integrates both the functional mode and the DFT mode in the test process.…”