BAG2-unterstützte analoge Layout-Synthese für TSMC 65 nm und GPDK 45 nm

Abstract

Analog circuit design automation remains an intense area of attention and has seen both new and existing tools continuing to be developed and targeting different phases of the analog design flow to reduce development time and cost. One of the promising tools is the Berkeley Analog Generator (BAG2) framework which is an open-source analog layout generator for automating and verifying circuit layouts. It promises a process-independent flow and it encourages design reuse due to using parameterized generators which can be scaled as required. This reduces the layout development time compared to manual handmade layouts. This work describes the effort and results of evaluating the BAG2 framework for the TSMC 65 nm and Cadence GPDK 45 nm processes. A case study is made with a number of circuits to discuss the problems in setting up and using BAG2 for the above technologies as well as the limitations and solutions required to utilize the framework effectively.