Balancing the Switching Losses of Paralleled SiC MOSFETs Using a Stepwise Gate Driver

Lüdecke, Christoph; Aghdaei, Alireza; Laumen, Michael; Doncker, Rik W. De

doi:10.1109/ecce47101.2021.9595091

Cited by 8 publications

(7 citation statements)

References 40 publications

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“…According to ref. [34], transient imbalance can be suppressed by adjusting the time delays between power switches. Turn-on and -off delays (t d,on and t d,off , respectively) can be directly affected by varying the firing angle (turn-on delay) and duty cycle (turn-off delay) of the PWM signal.…”

Section: Strategies Of Dynamic Current Imbalance Suppresionmentioning

confidence: 99%

“…In addition, ref. [34] proposes a gate driver that generates PWMs with different time delays of picoseconds, suppressing dynamic imbalance. Additionally, ref.…”

Section: Introductionmentioning

confidence: 99%

“…Additionally, ref. [35] balances the dynamic imbalance with a multi-stage gate driver with the ability to change the gate resistor during the transient stages. Finally, ref.…”

Section: Introductionmentioning

confidence: 99%

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Active Autonomous Open-Loop Technique for Static and Dynamic Current Balancing of Parallel-Connected Silicon Carbide MOSFETs

Giannopoulos,

Ioannidis,

Vokas

et al. 2023

Energies

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Silicon carbide (SiC) MOSFETs tend to become one of the main switching elements in power electronics applications of medium- and high-power density. Usually, SiC MOSFETs are connected in parallel to increase power rating. Unfortunately, unequal current sharing between power devices occurs due to mismatches in the technical parameters between devices and the layout of the power circuit. This current imbalance causes different current stress upon power switches, raising concerns about power system reliability. For over a decade, various methods and techniques have been proposed for balancing the currents between parallel-connected SiC MOSFETs. However, most of these methods cannot be implemented unless the deviation between the technical parameters of semiconductor switches is known. This requirement increases the system cost because screening methods are extremely costly and time-consuming. In addition, most techniques aim at suppressing only the transient current imbalance. In this paper, a simple but innovative current balancing technique is proposed, without the need of screening any power device. The proposed technique consists of an open-loop system capable of balancing the currents between two parallel-connected SiC MOSFETs, with the aid of two active gate drivers and an FPGA, actively and independently of the cause. Experimental test results validate that the proposed open-loop method can successfully achieve suppression of current imbalance between parallel-connected SiC MOSFETs, proving its durability and validity level.

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Section: Strategies Of Dynamic Current Imbalance Suppresionmentioning

confidence: 99%

“…In addition, ref. [34] proposes a gate driver that generates PWMs with different time delays of picoseconds, suppressing dynamic imbalance. Additionally, ref.…”

Section: Introductionmentioning

confidence: 99%

See 1 more Smart Citation

Active Autonomous Open-Loop Technique for Static and Dynamic Current Balancing of Parallel-Connected Silicon Carbide MOSFETs

Giannopoulos,

Ioannidis,

Vokas

et al. 2023

Energies

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“…Recently, MOSFETs have shown potential for high-power applicants due to high switching efficiency, high input impedance, fast switching speed, and low on-state resistance [8][9][10][11][12] . However, sometimes a single MOSFET cannot withstand the high current, so multiple MOSFETs need to be assembled in parallel to increase current handling capability and improve reliability and system efficiency 8,9,[13][14][15][16][17][18][19][20][21][22][23][24] . A current imbalance phenomenon may occur in the parallel assembly MOSFET due to the difference in the characteristics of devices, inconsistencies in the parasitic loop parameters and the aging degree of the components.…”

Section: Introductionmentioning

confidence: 99%

“…The current imbalance produces differentiation in transient current stress, power loss, and junction temperature among the MOSFETs, which affects a decline in device performance, increased thermal failure, and potentially leads to device failure 1,11,[14][15][16][25][26][27][28][29] . Therefore, the evenly current share control for parallel assembly MOSFETs is required.…”

Section: Introductionmentioning

confidence: 99%

A New Method of The Active Gate Driver for Current Balancing in The Parallel MOSFET Circuits

Meiyanto Eko Sulistyo,

Kaleg,

Damaris Adi Waskitho

et al. 2023

Evergreen

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MOSFETs are used in electronic circuits because they have high switching efficiency. Typically, MOSFETs are wired in parallel for applications that require high power. Theoretically, this circuit can multiply the current capability of parallel MOSFETs. However, even if all the MOSFETs in a parallel circuit have the same serial number and manufacturer, they might not necessarily have the same current characteristics. This could lead to issues with current imbalances, potentially causing harm to the MOSFETs, especially under severe circumstances. This study introduces a new Active Gate Driver (AGD) technique to balance the current in a parallel MOSFET circuit. The current difference can be used to modulate each MOSFET duty cycle. Specifically, the MOSFET with the smallest current capacity is configured as the Master, while the MOSFET following it is designated as the Slave. The interrupt time value for the duty cycle of each Slave MOSFET is influenced by the current differential between the Master and Slave. Consequently, different duty cycles for the Master and Slave MOSFETs can maintain the same current level. Based on the results of experiments conducted on three MOSFETs, it is evident that the AGD approach can effectively balance the current to an optimum level.

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Modeling of Thermal Ventilation Processes in Printed Circuit Boards of Power Sources

Plakhtii,

Nerubatskyi,

Shelest

et al. 2023

Lecture Notes in Networks and Systems

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Balancing the Switching Losses of Paralleled SiC MOSFETs Using a Stepwise Gate Driver

Cited by 8 publications

References 40 publications

Active Autonomous Open-Loop Technique for Static and Dynamic Current Balancing of Parallel-Connected Silicon Carbide MOSFETs

Active Autonomous Open-Loop Technique for Static and Dynamic Current Balancing of Parallel-Connected Silicon Carbide MOSFETs

A New Method of The Active Gate Driver for Current Balancing in The Parallel MOSFET Circuits

Modeling of Thermal Ventilation Processes in Printed Circuit Boards of Power Sources

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