2018
DOI: 10.1109/tmtt.2017.2757473
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Bandwidth Analysis of RF-DC Converters Under Multisine Excitation

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Cited by 45 publications
(34 citation statements)
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“…As the first voltage doubler stage following the matching network, the clamper is used to enhance the input voltage to the rectifying diode (D 2 ), as can be seen in Figure 2a. Clamping circuits are mostly used to implement the voltage multiplier [8]. For a time-varying sinusoidal input signal, the clamping circuit uses the peak of the negative voltage of the input signal to produce a positive shift in the signal during its positive part, as explained below.…”
Section: Voltage Doubler Operation Principlementioning
confidence: 99%
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“…As the first voltage doubler stage following the matching network, the clamper is used to enhance the input voltage to the rectifying diode (D 2 ), as can be seen in Figure 2a. Clamping circuits are mostly used to implement the voltage multiplier [8]. For a time-varying sinusoidal input signal, the clamping circuit uses the peak of the negative voltage of the input signal to produce a positive shift in the signal during its positive part, as explained below.…”
Section: Voltage Doubler Operation Principlementioning
confidence: 99%
“…s , and n show the thermal voltage, the saturation current, and the ideality factor, respectively. The voltage enhancement factor is defined as the ratio of input voltage to rectifying diode voltage V d with peak input voltage to clamper circuit V i [8]. For the ideal continuous wave excited voltage doubler, the voltage enhancement factor is two, if the clamper moves perfectly the input signal to the DC offset, equal to the peak of V i during the negative input cycle.…”
Section: Voltage Doubler Operation Principlementioning
confidence: 99%
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