Basic concepts of superconducting fault current limiter

Sharma, Dheeraj; Sahay, Kishan Bhushan

doi:10.1109/icpeices.2016.7853069

Cited by 7 publications

(9 citation statements)

References 12 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…Thus, the PUC inverter can't generate voltage more than the maximum value of the two voltage sources. So, it doesn't get application in medium or high-power applications [20]- [23]. Due to recent advancement in solar panels and its economic cost, it becomes feasible to use number of PV panels as DC sources.…”

Section: Seven-level Packed U-cell Invertermentioning

confidence: 99%

Standalone Operation of Modiﬁed Seven-Level Packed U-Cell Inverter for Solar Photovoltaic System

Sahay¹,

Singh²,

Maurya³

2020

Adv. sci. technol. eng. syst. j.

Self Cite

View full text Add to dashboard Cite

In this paper, a modified configuration of Single-Phase Seven-Level Packed U-Cell (PUC) Multilevel Inverter for solar photovoltaic system is presented & investigated for standalone operation. The Seven-Level MPUC Inverter comprises of six semiconductor switches & two DC links which generates seven voltage levels at the inverter output. The maximum amplitude of inverter output voltage is more than that of available maximum DC link value (i.e. sum of two DC link values). The voltage levels generated in the MPUC inverter is more with reduced number of components counts as compare to conventional multilevel inverter topologies like Cascaded H-Bridge (CHB) and Neutral Point Clamped (NPC). The proposed inverter finds application in PV System where green power is derived from two PV panels with different power rating and voltage rating connected to DC links. Several design considerations viz. the RMS value of inverter output voltage, switching frequency & voltage rating of semiconductor switches are taken into consideration to prove the advantages of the MPUC inverter. The simulation results of the MPUC inverter shows the appropriate operation of multilevel inverter.

show abstract

Section: Seven-level Packed U-cell Invertermentioning

confidence: 99%

Standalone Operation of Modiﬁed Seven-Level Packed U-Cell Inverter for Solar Photovoltaic System

Sahay¹,

Singh²,

Maurya³

2020

Adv. sci. technol. eng. syst. j.

Self Cite

View full text Add to dashboard Cite

show abstract

“…If the current in the line exceeds the protection value, the superconductor transits to normal state and inserts a high resistance in the line. The circuit is designed so that the maximum allowed current is the HTS critical current [6]. There are some applications of this SFCL typologies to real cases.…”

Section: State Of the Artmentioning

confidence: 99%

Design of a SFCL with an Inductive Stage in Series with a Resistive Stage Which Transits by Magnetic Field

Rivera¹,

Álvarez²,

Pérez³

2020

IFIP Advances in Information and Communication Technology

View full text Add to dashboard Cite

One of the most interesting applications of superconductors in power systems is the so called "Superconductor Fault Current Limiter (SFCL)". This is a device that makes the lines exhibit a variable short-circuit impedance: very low (almost null) under normal operation, and high when the current increases above the security limit of the line. There are two types of SFCL: resistive and inductive. The first one consists of a superconducting element in series with the line. The element is designed with a critical current equal the security limit of the line. When the current in the line is higher, the element transits and a high resistance arises, protecting the line. The second type is connected in series with the line too. It consists of an inductor with the magnetic core shielded by a superconducting screen. The screen is designed to transit by magnetic field when the current in the coil (line current) is higher than the security limit of the line. At this time, a high reactance arises protecting the line. The PhD thesis we are working on is a new concept of SFCL with two stages (resistive and inductive) in series designed to solve some problems of each type separately. In this case, the resistive stage is located in the gap of the inductive stage magnetic core. Firstly, the objective is to make the magnetic screen transit. When this happens, the magnetic field penetrates the core and surrounds the resistive stage provoking its transition. In this paper, we present the work philosophy of this novel device, which does not have equivalent in conventional (nonsuperconducting) technology.

show abstract

“…In order to correctly model the distribution of temperature across a sample, weight coefficients were introduced into the model; these were calculated for each layer as follows: P = K s (T)*P+K Cu (T)*P+K PbSnAg (T)*P+K AISI304 (T)*P, (1) Where P is the heat power generated in the sample; K s (T), K Cu (T), K PbSnAg (T) K AISI304 (T) are the weight coefficient for the HTS tape base material, copper, solder and AISI 304 stainless steel respectively. , (2) Where R s (T), R cu (T), R PbSnAg (T), R AISI304 (T) are the values of resistance per meter of sample length of the HTS tape base material, copper, solder and AISI 304 stainless steel, respectively.…”

Section: Fig 1 2d Geometry Was Used To Model the Samplesmentioning

confidence: 99%

“…Using of the superconducting fault current limiters (SFCL) in networks allows drastic decrease of fault currents, enhancing the reliability of the power system and reduce the wear of electrical equipment [1][2][3][4][5]. Currently, efforts aimed at creating SFCL are underway around the world [6][7][8][9][10], with several dozen systems having been developed and currently undergoing trials [11][12][13][14][15][16][17].…”

Section: Introductionmentioning

confidence: 99%

Modeling the Heating in a High Temperature Superconducting Current Carrying Element in Fault Current Limiters

Maklalov,

Scherbakov*,

Gorbunova

2019

IJITEE

View full text Add to dashboard Cite

Mathematical model was developed for modeling the increase temperature in high temperature superconducting (HTS) current carrying element in superconducting fault current limiters (SFCL). The variation in the heating up of HTS element along its length is a result primarily of the variation in its resistance that has to do with the manufacturing process employed to make it.The model was developed and mathematical modeling of the process was carried out in the Comsol MultiPhysics software package. Element that was tested was a 12 mm wide stack of three stainless steel tapes and three HTS soldered to each other. In order to get more precise parameters for the models the cross-sectional thermal conductivity was measured for the stacks of HTS of two different types. The estimates obtained using the model were very close to experimental data. The impact was also studied of the spread of the electrical resistance of HTS on how fast the current carrying element made from it heated up.

show abstract

Basic concepts of superconducting fault current limiter

Cited by 7 publications

References 12 publications

Standalone Operation of Modiﬁed Seven-Level Packed U-Cell Inverter for Solar Photovoltaic System

Standalone Operation of Modiﬁed Seven-Level Packed U-Cell Inverter for Solar Photovoltaic System

Design of a SFCL with an Inductive Stage in Series with a Resistive Stage Which Transits by Magnetic Field

Modeling the Heating in a High Temperature Superconducting Current Carrying Element in Fault Current Limiters

Contact Info

Product

Resources

About