Benchmarking of MoS<sub>2</sub>FETs With Multigate Si-FET Options for 5 nm and Beyond

Agarwal, Tarun; Yakimets, D.; Raghavan, Praveen; Radu, Iuliana; Thean, Aaron; Heyns, Marc; Dehaene, Wim

doi:10.1109/ted.2015.2491021

Cited by 30 publications

(22 citation statements)

References 20 publications

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“…In this section, we benchmark the chosen device options using a 15-stage RO with a fan-out of three, including the effect of parasitic resistive and capacitive components [12]. We would like to emphasize that the nFETs and pFETs are assumed to be balanced in the RO.…”

Section: Circuit-level Comparisonmentioning

confidence: 99%

Performance Comparison of s-Si, In_0.53Ga_0.47As, Monolayer BP- and WS₂-Based n-MOSFETs for Future Technology Nodes—Part II: Circuit-Level Comparison

Agarwal

Rau

Radu

et al. 2019

IEEE Trans. Electron Devices

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The first part of this paper presented the device-level comparison of emerging materials (In 0.53 Ga 0.47 As and 2-D materials) and device architecture (NW FETs) with s-Si FinFETs. In order to further understand the performance and energy efficiency of these device options for future technology nodes, it is required to go beyond the device-level comparison by accounting for not only intrinsic but also the extrinsic parasitic elements. In this paper, we present the comparison of s-Si, In 0.53 Ga 0.47 As, and 2-D material-based n-type MOSFETs using the circuitlevel figure of merits across three successive future technology nodes. The analysis incorporates both device characteristics obtained from an advanced quantum mechanical simulation tool and circuit-level comparison, which accounts for device parasitic elements and wiring load. The results show that 2-D material DG MOSFETs present a more energy-efficient device option than s-Si and In 0.53 Ga 0.47 As FinFETs in sub-0.7-V supply voltage regime and In 0.53 Ga 0.47 As nanowire (NW) FETs can outperform s-Si multi-gate (MuG) FETs and 2-D material FETs, but when considering non-idealities, s-Si NW FETs remain both faster and more energy-efficient device option.

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Section: Circuit-level Comparisonmentioning

confidence: 99%

Performance Comparison of s-Si, In_0.53Ga_0.47As, Monolayer BP- and WS₂-Based n-MOSFETs for Future Technology Nodes—Part II: Circuit-Level Comparison

Agarwal

Rau

Radu

et al. 2019

IEEE Trans. Electron Devices

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“…For this reason, single-orbital tight-binding models fail to represent their complexity and models with up to 11 bands are necessary [125], although the simplest alternatives for monolayers based on k • p are available [126]. The heavy electron effective mass in TMDs together with their low in-plane dielectric constant initially placed these materials as good candidates for ultra-short channel FETs [51], [127] and also TFETs [64], but nowadays many more of their properties are being explored and more applications in electronics are found. One of them is the possibility of combining them as building blocks to form lateral or vertical van der Waals heterostructures (LH and VH, respectively) with tailor-made characteristics.…”

Section: Modeling Of 2d-materials-based Devicesmentioning

confidence: 99%

Modeling of Electron Devices Based on 2-D Materials

Marín

Perucchini

Marian

et al. 2018

IEEE Trans. Electron Devices

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The advent of graphene and related two-dimensional (2D) materials has attracted the interest of the electron device research community in the last fourteen years. The possibility to boost transistor performance and the prospects to build novel device concepts with 2D materials and their heterostructures has awakened a strong experimental interest that requires continuous support from modeling. In this paper we review the state of the art in simulation of electron devices based on two-dimensional materials. We outline the main methods to model the electronic bandstructure and to study electron transport, classifying them in terms of accuracy and computational cost. We briefly discuss how they can be combined in a multiscale approach to provide quantitative understanding of the mechanisms determining the operation of electron devices and we examine the application of these methods to the different families of 2D materials. Finally we shortly analyze the main open challenges of modeling 2D-based electron devices.

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“…In the model, the metallic contacts to the source and drain are overlooked. It may be included in a device model as shown by Agarwal et al [ 3 ]. The contact resistance will mainly decrease the ON-state current.…”

Section: Calculation Detailsmentioning

confidence: 99%

“…With the rapid development of the semiconductor technologies, the transistor will soon go into the sub-10 nm or even sub-5 nm scale in the near future according to the ITRS 2.0 [ 1 , 2 , 3 , 4 ]. Unavoidable problems arise, such as heat dissipation and quantum effects, etc.…”

Section: Introductionmentioning

confidence: 99%

Two-Dimensional MX2 Semiconductors for Sub-5 nm Junctionless Field Effect Transistors

et al. 2018

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Two-dimensional transitional metal dichalcogenide (TMDC) field-effect transistors (FETs) are proposed to be promising for devices scaling beyond silicon-based devices. We explore the different effective mass and bandgap of the channel materials and figure out the possible candidates for high-performance devices with the gate length at 5 nm and below by solving the quantum transport equation self-constantly with the Poisson equation. We find that out of the 14 compounds, MoS2, MoSe2, and MoTe2 may be used in the devices to achieve a good subthreshold swing and a reasonable current ON-OFF ratio and delay. Our work points out the direction of further device optimization for experiments.

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Benchmarking of MoS₂FETs With Multigate Si-FET Options for 5 nm and Beyond

Cited by 30 publications

References 20 publications

Performance Comparison of s-Si, In_0.53Ga_0.47As, Monolayer BP- and WS₂-Based n-MOSFETs for Future Technology Nodes—Part II: Circuit-Level Comparison

Performance Comparison of s-Si, In_0.53Ga_0.47As, Monolayer BP- and WS₂-Based n-MOSFETs for Future Technology Nodes—Part II: Circuit-Level Comparison

Modeling of Electron Devices Based on 2-D Materials

Two-Dimensional MX2 Semiconductors for Sub-5 nm Junctionless Field Effect Transistors

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Benchmarking of MoS2FETs With Multigate Si-FET Options for 5 nm and Beyond

Cited by 30 publications

References 20 publications

Performance Comparison of s-Si, In0.53Ga0.47As, Monolayer BP- and WS2-Based n-MOSFETs for Future Technology Nodes—Part II: Circuit-Level Comparison

Performance Comparison of s-Si, In0.53Ga0.47As, Monolayer BP- and WS2-Based n-MOSFETs for Future Technology Nodes—Part II: Circuit-Level Comparison

Modeling of Electron Devices Based on 2-D Materials

Two-Dimensional MX2 Semiconductors for Sub-5 nm Junctionless Field Effect Transistors

Contact Info

Product

Resources

About

Benchmarking of MoS₂FETs With Multigate Si-FET Options for 5 nm and Beyond

Performance Comparison of s-Si, In_0.53Ga_0.47As, Monolayer BP- and WS₂-Based n-MOSFETs for Future Technology Nodes—Part II: Circuit-Level Comparison

Performance Comparison of s-Si, In_0.53Ga_0.47As, Monolayer BP- and WS₂-Based n-MOSFETs for Future Technology Nodes—Part II: Circuit-Level Comparison