Bias-Temperature-Stress Characteristics of $ \hbox{ZnO/HfO}_{2}$ Thin-Film Transistors

Siddiqui, J. J.; Phillips, Jamie; Leedy, Kevin D.; Bayraktaroglu, B.

doi:10.1109/ted.2012.2189048

Cited by 13 publications

(9 citation statements)

References 22 publications

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“…11,18 As HfO 2 was used as the dielectric in all the TFTs, thus charge trapping in the dielectric can be neglected. It has been reported that adsorbed oxygen and water molecules at the back channel plays an important role in the stability of un-passivated oxide TFTs.…”

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confidence: 99%

Highly stable thin film transistors using multilayer channel structure

Nayak

Wang

Anjum

et al. 2015

Applied Physics Letters

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We report highly stable gate-bias stress performance of thin film transistors (TFTs) using zinc oxide (ZnO)/hafnium oxide (HfO2) multilayer structure as the channel layer. Positive and negative gate-bias stress stability of the TFTs was measured at room temperature and at 60 °C. A tremendous improvement in gate-bias stress stability was obtained in case of the TFT with multiple layers of ZnO embedded between HfO2 layers compared to the TFT with a single layer of ZnO as the semiconductor. The ultra-thin HfO2 layers act as passivation layers, which prevent the adsorption of oxygen and water molecules in the ZnO layer and hence significantly improve the gate-bias stress stability of ZnO TFTs.

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confidence: 99%

Highly stable thin film transistors using multilayer channel structure

Nayak

Wang

Anjum

et al. 2015

Applied Physics Letters

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“…11,18-20 As a result, when these films are integrated with ZnO TFTs, the device performance can be improved immensely. 11,12,21 For example, Grundbacher et al 11 demonstrated back gated ALD ZnO TFTs using ALD HfO 2 as the gate dielectric with a saturation mobility (l SAT ) of $11 cm 2 V À1 s À1 , current on/off ratio (I on/off ) > 10 6 , threshold voltages (V th ) ranging from À2.7 V to 6.3 V (depending on the thickness of the ZnO channel), and a subthreshold voltage swing (SS) of $500 mV/decade. Based on these reports, the potential for a high performance ALD-based ZnO TFT that can be fabricated at low temperatures and easily scaled up for commercial applications is extremely promising.…”

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confidence: 99%

Schottky barrier source-gated ZnO thin film transistors by low temperature atomic layer deposition

Alex

Gupta

Afshar

et al. 2013

Applied Physics Letters

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“…However, a small, but a finite shift of V th and SS values suggests some charge trapping at the interface between dielectric and semiconductor layers takes place. It is well known for oxide TFTs that absorbed water and/or oxygen molecules can act as electron trapping centers at the gate dielectric/channel interface . Hence, during the PBS, electrons are injected from the channel and are trapped at the interface leading to V th shifting toward more positive voltage values.…”

Section: Resultsmentioning

confidence: 80%

“…It is well known for oxide TFTs that absorbed water and/or oxygen molecules can act as electron trapping centers at the gate dielectric/channel interface. [23] Hence, during the PBS, electrons are injected from the channel and are trapped at the interface leading to V th shifting toward more positive voltage values. However, during NBS, electrons are expected to detrap again from the trapping centers and return to the channel, resulting in V th shifting toward negative voltage values.…”

Section: Resultsmentioning

confidence: 99%

Transparent Electronics Using One Binary Oxide for All Transistor Layers

Alshammari

Hota

Alshareef

2018

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A novel process is developed in which thin film transistors (TFTs) comprising one binary oxide for all transistor layers (gate, source/drain, semiconductor channel, and dielectric) are fabricated in a single deposition system at low temperature. By simply changing the flow ratio of two chemical precursors, C8H24HfN4 and (C2H5)2Zn, in an atomic layer deposition system, the electronic properties of the binary oxide (Hf xZn1−xO2−δ or HZO) are tuned from conducting, to semiconducting, to insulating. Furthermore, by carefully optimizing the properties of the various transistor HZO layers, all‐HZO thin film transistors are achieved with excellent performance on both glass and plastic substrates. Specifically, the optimized all‐HZO TFTs show a saturation mobility of ≈17.9 cm2 V−1 s−1, low subthreshold swing of ≈480 mV dec−1, high Ion/Ioff ratio of >109, and excellent gate bias stability at elevated temperatures. In addition, all‐HZO inverters with high DC voltage gain (≈470), and all‐HZO ring oscillators with low stage delay (≈408 ns) and high oscillation frequency of 245 kHz are demonstrated. This approach presents a novel, simple, high performance, and cost‐effective process for the fabrication of indium‐free transparent electronics.

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Bias-Temperature-Stress Characteristics of $ \hbox{ZnO/HfO}_{2}$ Thin-Film Transistors

Cited by 13 publications

References 22 publications

Highly stable thin film transistors using multilayer channel structure

Highly stable thin film transistors using multilayer channel structure

Schottky barrier source-gated ZnO thin film transistors by low temperature atomic layer deposition

Transparent Electronics Using One Binary Oxide for All Transistor Layers

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