2010
DOI: 10.1007/978-3-642-13217-9_3
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Binding Nested OpenMP Programs on Hierarchical Memory Architectures

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Cited by 6 publications
(4 citation statements)
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“…By sharing the same mainboard, the devices avoid having to move information through an external network, thereby reducing the latency and overload associated with parallelism. The additional benefit obtained from utilizing OpenMP is that it can be employed as a controller and communicator for the integrated boards at the same node in a nested parallelism scheme [24].…”
Section: Design Of the Parallel Algorithmmentioning
confidence: 99%
“…By sharing the same mainboard, the devices avoid having to move information through an external network, thereby reducing the latency and overload associated with parallelism. The additional benefit obtained from utilizing OpenMP is that it can be employed as a controller and communicator for the integrated boards at the same node in a nested parallelism scheme [24].…”
Section: Design Of the Parallel Algorithmmentioning
confidence: 99%
“…It focus on data placement and movement but do not deals with number of threads. [16] and [17] have also proposed to extend OpenMP for controlling task placement, but both of them requires programmers to set number of threads for nested parallel regions explicitly. Algorithms to distribute threads over different tasks have been studied in [4], but they have not tried to integrate such algorithms into programming language.…”
Section: Related Workmentioning
confidence: 99%
“…Schmidl et al create a distance matrix [32] to represent distances between cores and use topology-aware thread binding [33] of parallel loop nests. Maranthe and Mueller automate profiling to guide page placement [23].…”
Section: Related Workmentioning
confidence: 99%