Proceedings of 2013 International Conference on IC Design &Amp; Technology (ICICDT) 2013
DOI: 10.1109/icicdt.2013.6563320
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Biosequences analysis on NanoMagnet Logic

Abstract: POLITECNICO DI TORINO Repository ISTITUZIONALE Biosequences analysis on NanoMagnet Logic / Wang J.C.; Vacca M.; Graziano M.; Ruo Roch M.; Zamboni M.. -ELETTRONICO.Abstract-In the last decade Quantum dot Cellular Automata technology has been one of the most studied among the emerging technologies. The magnetic implementation, NanoMagnet Logic (NML), is particularly interesting as an alternative solutions to CMOS technology. The main advantages of NML circuits resides in the possibility to mix logic and memory i… Show more

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Cited by 15 publications
(15 citation statements)
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“…Nevertheless, we can summarize that in CMOS it is possible to achieve a speed-up of 2:5Â without affecting area or power requirements significantly. Moreover a NML implementation has been proposed in [52]. The article shows how it is possible to interleave data also in the case of NML to increase throughput without changing the hardware structure.…”
Section: Case Study: Protein Alignment Systolic Arraymentioning
confidence: 99%
See 1 more Smart Citation
“…Nevertheless, we can summarize that in CMOS it is possible to achieve a speed-up of 2:5Â without affecting area or power requirements significantly. Moreover a NML implementation has been proposed in [52]. The article shows how it is possible to interleave data also in the case of NML to increase throughput without changing the hardware structure.…”
Section: Case Study: Protein Alignment Systolic Arraymentioning
confidence: 99%
“…As described before, this allows to avoid retiming (that must take into account also the physical layout of the circuit) and yet obtain improvements using interleaving only. In [52] results show that CMOS circuit can operate at 370 MHz consuming 0:72 mW , while for NML the operating frequency is given by the technology and is 100 MHz and power consumption in the case of Magnetoelastic implementation is of 10 mW only. It is important to highlight that in NML without applying interleaving there must be a delay of 209 clock cycles between one input and the successive one, while with interleaving it is possible to provide one input at every clock cycle as it is in CMOS: this therefore proves the benefits that derive from the adoption of pipeline interleaving in this technology.…”
Section: Case Study: Protein Alignment Systolic Arraymentioning
confidence: 99%
“…Furthermore it is resistant to radiations and heat, being as a consequence a perfect candidate for military and space applications. Even more notably, it has also a potential very low power consumption with respect to stateof-the-art CMOS technology [15], confirming thus to be the possible candidate to solve those power issues that are the designer nightmares when dealing with forthcoming scaled CMOS technology nodes [16] [17].…”
Section: Introductionmentioning
confidence: 99%
“…CONTRIBUTIONS. After a short introduction on NML circuit layout and a discussion on the timing issues here mentioned in Section II, 1) we introduce in Section III the test architecture we implemented based on a complex systolic array circuit for Biosequence analysis [15]. This architecture represents itself a novelty for the state of the art in NML, because it is completely designed at the layout level and because it respects all the technological constraints, without relying on unrealistic assumptions.…”
Section: Introductionmentioning
confidence: 99%
“…Then ToPoliNano can perform different analysis on the circuit layout, a logical simulation, a fault analysis and an area and power estimation. more complex and realistic circuits, like microprocessors [14], decoders for telecommunication [15] and a systolic array for biosequences analysis [16]. Due to the complexity of such circuits, finite element micromagnetic simulators cannot be used to verify the circuit functionality.…”
Section: Introductionmentioning
confidence: 99%