The first 1k bit DRAM and microprocessor were mass-produced at the beginning of 1970s. At that time, the technology was 10 ~ 8 µm PMOS LSls, and more than 1,000 MOSFETs were integrated in a chip. This was the beginning of ‘microelectronics.’ Now, they have evolved to 10 nm-range CMOS LSls, and we call it ‘nano-electronics.’ In the past 50 years, we have experienced 23 generations (each about 2.5 years) of the shrinkage, and the MOSFETs size has decreased by 1,000 times, resulting in an increase in integration density with 10 million times. The continuous increase in the integration with the constant rate is the Moore's law, but no one including me could not imagine its continuation of over 50 years. The downsizing of MOSFETs has been accomplished based on the scaling scheme proposed by R. Dennard, but we have encountered very serious problems at every new generation. Fortunately, however, we have so far succeeded in finding the solutions. This paper describes the history of the development of Si MOS Integrated Circuits technology in the past 50 years based on my experience and results which had been obtained by the teamwork of my R & D groups at Toshiba and the collaboration with my colleagues.