Bit-Resolution Improvement of an Optically Sampled Time-Interleaved Analog-to-Digital Converter Based on Data Averaging

Villa-Angulo, Carlos; Hernandez-Fuentes, Ivan Olaf; Villa-Angulo, Rafael; Donkor, Eric

doi:10.1109/tim.2011.2179335

Cited by 5 publications

(3 citation statements)

References 21 publications

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“…This is equivalent to 50 kS/s (i.e., Fs equals to 20 µs) and allows to (i) cover the entire signal bandwidth of the server power consumption, and (ii) reach a measurement precision below 1 % (σ) of uncertainty (a.k.a. oversampling and averaging method [52]). When the HW-FIFO reaches a watermark on the number of samples acquired (we set it to 32), an interrupt is raised and the samples are flushed by the PRU0 into the PRU Shared memory (12 kB).…”

Section: Algorithm Implementation In the Dig Iot Devicesmentioning

confidence: 99%

pAElla: Edge AI-Based Real-Time Malware Detection in Data Centers

Libri

Bartolini

Benini

2020

IEEE Internet Things J.

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The increasing use of Internet-of-Things (IoT) devices for monitoring a wide spectrum of applications, along with the challenges of "big data" streaming support they often require for data analysis, is nowadays pushing for an increased attention to the emerging edge computing paradigm. In particular, smart approaches to manage and analyze data directly on the network edge, are more and more investigated, and Artificial Intelligence (AI) powered edge computing is envisaged to be a promising direction. In this paper, we focus on Data Centers (DCs) and Supercomputers (SCs), where a new generation of high-resolution monitoring systems is being deployed, opening new opportunities for analysis like anomaly detection and security, but introducing new challenges for handling the vast amount of data it produces. In detail, we report on a novel lightweight and scalable approach to increase the security of DCs / SCs, that involves AI-powered edge computing on high-resolution power consumption. The method -called pAElla -targets real-time Malware Detection (MD), it runs on an out-of-band IoT-based monitoring system for DCs / SCs, and involves Power Spectral Density of power measurements, along with AutoEncoders. Results are promising, with an F1-score close to 1, and a False Alarm and Malware Miss rate close to 0%. We compare our method with State-of-the-Art MD techniques and show that, in the context of DCs / SCs, pAElla can cover a wider range of malware, significantly outperforming SoA approaches in terms of accuracy. Moreover, we propose a methodology for online training suitable for DCs / SCs in production, and release open dataset and code.

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Section: Algorithm Implementation In the Dig Iot Devicesmentioning

confidence: 99%

pAElla: Edge AI-Based Real-Time Malware Detection in Data Centers

Libri

Bartolini

Benini

2020

IEEE Internet Things J.

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“…Parallel channel sampling based on generalized sampling theory is an effective method to achieve high-speed A/D conversion [2]. Many parallel structures are proposed to use for realizing high-speed sampling such as time-interleaved (TI) structure [3][4][5][6][7][8][9], quadrature mirror filter bank (QMFB) structure [10], hybrid filter bank (HFB) [11][12][13][14][15][16][17][18] structure, delta-sigma filter bank structure [19][20][21] and frequency conversion hybrid structure [1] [22]. The main idea of the parallel ADC structures is to use many channels to segment broadband analog input signal, and the channels use low-bandwidth ADC to sample and quantize the segmented signals, and the sub-band signals are combined to get the digital reconstruction of the original bandwidth analogue input signal.…”

Section: Introductionmentioning

confidence: 99%

A Modulated Hybrid Filter Bank for Wide-Band Analog-to-Digital Converters

Yuan¹,

Wang²,

Zhang³

2014

JMM

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It is difficult to use a single analog-to-digital conversion (ADC) to satisfy the requirements for conversion of an ultra-wideband signal. A parallel architecture for high bandwidth ADC, named cosine modulated hybrid filter bank, is presented to address this problem. First, the proposed architecture shifts the input signal spectrum by means of mixers. The modulated signal is channelized into smaller frequency subband signals using identical lowpass analog filters. Then the subband signals are digitized through identical narrowband ADCs, respectively. Finally, the digitized signals are up-sampled, then filtered and combined to reconstruct the digital representation of the original wide-band input signal. The digital filters are designed to use the eigenfilter method based on total least squares error criterion. Since the sample-and-hold circuits needed are only identical narrowband baseband circuits, the simplicity of the system makes the design easier and cheaper. Several design examples are used to illustrate the performance of the proposed system.

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“…Recent progress in optical components has opened an unprecedented opportunity to develop practical optoelectronic ADCs. Several techniques for optical analog-to-digital converters have been reported [1,2]. Among these are techniques that employ time-division multiplexing [3], diffractive optics [4], wavelength division multiplexing [5], soliton self-frequency shifts [6,7], and optical pulse stretching [8].…”

Section: Introductionmentioning

confidence: 99%

Implementation of a 10.24 GS/s 12-bit Optoelectronics Analog-to-Digital Converter Based on a Polyphase Demultiplexing Architecture

Villa-Angulo¹,

Hernandez-Fuentes²,

Villa-Angulo³

et al. 2013

Journal of Applied Research and Technology

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In this paper we present the practical implementation of a high-speed polyphase sampling and demultiplexing architecture for optoelectronics analog-to-digital converters (OADCs). The architecture consists of a one-stage divideby-eight decimator circuit where optically-triggered samplers are cascaded to sample an analog input signal, and demultiplex different phases of the sampled signal to yield low data rate for electronic quantization. Electrical-in to electrical-out data format is maintained through the sampling, demultiplexing and quantization processes of the architecture thereby avoiding the need for electrical-to-optical and optical-to-electrical signal conversions. We experimentally demonstrate a 10.24 giga samples per second (GS/s), 12-bit resolution OADC system comprising the optically-triggered sampling circuits integrated with commercial electronic quantizers. Measurements performed on the OADC yielded an effective bit resolution (ENOB) of 10.3 bits, spurious free dynamic range (SFDR) of -32 dB and signal-to-noise and distortion ratio (SNDR) of 63.7 dB.

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Bit-Resolution Improvement of an Optically Sampled Time-Interleaved Analog-to-Digital Converter Based on Data Averaging

Cited by 5 publications

References 21 publications

pAElla: Edge AI-Based Real-Time Malware Detection in Data Centers

pAElla: Edge AI-Based Real-Time Malware Detection in Data Centers

A Modulated Hybrid Filter Bank for Wide-Band Analog-to-Digital Converters

Implementation of a 10.24 GS/s 12-bit Optoelectronics Analog-to-Digital Converter Based on a Polyphase Demultiplexing Architecture

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